This paper describes a multi-agent based availability prediction approach for the reconfigurable networked software system based on the complex system’s model and simulation. Firstly, the definition of the features and availability of reconfigurable networked software system is introduced. Secondly, on the basis of the multi-agent based networked software system modeling method, an availability...

Hierarchical Petri nets allow a more abstract view whereas reconfigurable Petri nets model dynamic structural adaptation. In this contribution we present the combination of reconfigurable Petri nets and hierarchical Petri nets yielding an hierarchical structure for reconfigurable Petri nets. Hierarchies are established by substituting transitions by subnets. These subnets are themselves reconfi...

We present a scalable, dynamically reconfigurable processor design that encompasses both reconfigurable circuitry and software-capable programmability for supercomputing applications on FPGAs. Advanced FPGA chips contain both reconfigurable logic blocks and embedded processor cores, providing the developer with an environment for embedded system design1. Since the reconfigurable fabric and the ...

This paper shows the impact of the trade-off between reconfigurable and non-reconfigurable parts of the FPGA to the dependability characteristics of the whole design. Stochastic Petri nets have been used to compute reliability and dependability characteristics in a simple FPGA design with dynamically reconfigurable modules. Some parts of the design are not possible or proper to reconfigure dyna...

Reconfigurable computing is becoming increasingly attractive for many applications. This survey covers three aspects of reconfigurable computing: architectures, design methods, and applications. Our paper includes recent advances in reconfigurable architectures, such as the Altera Stratix II and Xilinx Virtex 4 FPGA devices. We identify major trends in generalpurpose and special-purpose design ...

General-purpose processors perform various tasks, such as scientific computation or image processing. However, the performance of dedicated circuits (ASICs) are much better. Unfortunately, these circuits only perform a very specific task and their development cost is important. The availability of reconfigurable circuits (like FPGAs) opens the way to new interesting architectures. This paper pr...

Reconfigurable cores support post-release updates which shortens time-to-market while extending circuits’ lifespan. Reconfigurable cores can be provided as hard cores (ASIC) or soft cores (RTL). Soft reconfigurable cores outperform hard reconfigurable cores by preserving the ASIC synthesis flow, at the cost of lowering scalability but also exacerbating timing closure issues. This article tackle...

Reconfigurable computing has become an essential part of research since last few decades. By placing computationally intensive applications in the reconfigurable logic area of the system, the remarkable performance gains have been found. Among the different research directions in the domain of reconfigurable computing, the use of multiple reconfigurable devices has become the most promising sol...

Reconfigurable architecture provides a high performance computing paradigm. We can implement the compute-intensive functions into reconfigurable devices to optimize the application performance. In current reconfigurable hardware designs, the function-level reconfigurable hardware has high reusability and low maintenance cost. However, the sharing mechanism and the function invocation interface ...

Hierarchical Petri nets allow a more abstract view and reconfigurable Petri nets model dynamic structural adaptation. In this contribution we present the combination of reconfigurable Petri nets and hierarchical Petri nets yielding hierarchical structure for reconfigurable Petri nets. Hierarchies are established by substituting transitions by subnets. These subnets are themselves reconfigurable...