This paper presents high speed direct digital frequency synthesizer (DDFS) based on pipelining phase accumulator (PA). The proposed 12-bit PA contains three pipelining stages with 4-bit carry-lookahead adder (CLA) with the carries ripple between these stages. Comparing results between similar phase accumulator designed with ripple carry adder on, Cyclone III FPGA platform reveals that the propo...

Title of Document: INVESTIGATION OF REFRIGERANT DISTRIBUTION IN A HOUSEHOLD REFRIGERATOR WITH A FOCUS ON THE ROLE OF THE ACCUMULATOR Cara Sanderson Martin, M.S. Mechanical Engineering, 2007 Directed By: Professor Reinhard Radermacher, Ph.D. Department of Mechanical Engineering In order to maximize household refrigerator performance, it is important to understand the basic relationship between e...

Cryptographic accumulators are well-known to be useful in many situations. However, the most efficient accumulator (the RSA accumulator) it is not secure against a certificate authority who has herself selected the RSA modulus n. We generalize previous work and define the root accumulator in modules over Euclidean rings. We prove that the root accumulator is secure under two different pairs of ...

A 64 X64-bit iterating multiplier, the Stanford Pipelined Iterative Multiplier (SPIM), is presented. Tbe pipelined array consists of a small tree of 4:2 adders. The 4:2 tree is better suited than a Wallace tree for a VLSI implementation because it is a more regular structure. A 4:2 carry-save accumulator at the bottom of the array is used to iteratively accumulate partial products, allowing a p...

This paper describes a 9-bit 6.2-GHz low power quadrature direct digital synthesizer (DDS) implemented in a 0.18m SiGe BiCMOS technology. With a 9-bit pipeline accumulator and two 8-bit sine-weighted current steering DACs, this DDS is capable of generating quadrature sinusoidal waveforms up to 3.15 GHz with a maximum clock frequency of 6.2 GHz. Packed with more than 13 500 transistors, the quad...

In this short note, we present an extension of Nguyen’s bilinear-map based accumulator scheme [8] to support non-membership witnesses and corresponding non-membership proofs, i.e., cryptographic proofs that an element has not been accumulated to a given set. This complements the non-membership proofs developed by Li et al. [7] for the RSA accumulator [2, 3, 5], making the functionality of the b...

Many image transformations in computer vision and graphics involve a pipeline when an initial integer image is processed with floating point computations for purposes of symbolic information. Traditionally, in the interests of time, the floating point computation is approximated by integer computations where the integerization process requires a guess of an integer. Examples of this phenomenon ...

Jay Kim Structural Dynamics Research Laboratory University of Cincinnati Cincinnati, OH 45221-0072 Since the suction accumulator is one of components with large surface area in rolling piston type rotary compressors, its contribution to the total radiated noise may be substantial. In this study, possible noise sources of the accumulator are discussed. The noise radiated from accumulators are pr...

One of the most widely cited models in time estimation is the “pacemaker-counter clock” which consists of a pacemaker generating pulses and an accumulator in which pulses are stored. The level reached in this accumulator at the end of an interval to be estimated sets the subjective elapsed time. Although this model is able to accurately describe temporal performance, it can nevertheless be cons...