Balancing the computational load over multiprocessor networks is an important problem in massively parallel systems. The key advantage of such systems is to allow concurrent execution of workload characterized by computation units known as processes or tasks. The scheduling problem is to maintain a balanced execution of all the tasks among the various available processors (nodes) in a multiproc...

The growing size of the multiprocessor system increases its vulnerability to component failures. The fault diagnosis is the process of identifying faulty processors in a system through self-testing, and the diagnosability is an important parameter to measure the reliability of an interconnection network. As a new measure of fault tolerance, conditional diagnosability can better evaluate the rea...

Non-Uniform Memory Access (NUMA) architectures make it possible to build large-scale shared memory multiprocessor systems in comparison with non-scalable UniformMemory Access (UMA) architectures. Most NUMA multiprocessor operations such as scheduling and synchronizing processes, accessing data from processors to memory models and allocating distributed memory space to di erent processors, are p...

The modeling and performance analysis of the twodimensional (2-D) inverse fast cosine transform (FCT) algorithm on a multiprocessor has been considered. The computational and communication complexities of this algorithm on shared bus, multistage interconnection network, and mesh-connected multiprocessor architectures have been determined. The performance of the three multiprocessor architecture...

Omega Networks are a famous subclass of blocking Multistage Interconnection Networks (MINs). They have been recently identified as an efficient interconnection network for a switching fabric of communication structures such as gigabit ethernet switch, terabit router, and ATM switch. Interconnection network performance is also a key factor when constructing multiprocessor systems. In this paper ...

This paper evaluates the Triplet Based Architecture, TriBA – a new idea in chip multiprocessor architectures and a class of Direct Interconnection Network (DIN). TriBA consists of a 2D grid of small, programmable processing units, each physically connected to its three neighbors so that advantageous features of group locality can be fully and efficiently utilized. Any communication model can be...

A banyan network and its topologically equivalent ones have recently been adopted as the interconnection networks in a multiprocessor system. Often a multiprocessor system is reconfigured when the banyan network becomes faulty. It is possible to avoid a complicated reconfiguration process as long as the faulty banyan network still possesses the dynamic full access (DFA) property. In this short ...

In this paper we propose an efficient distributed routing and wavelength allocation method for a Single-hop WDM (Wavelength Division Multiplexing) all-Optical Interconnection Network for Scalable Multiprocessor systems. By wavelength allocation, we mean the assignment of unique wavelength(s) to the access nodes. The WDM techniques enable extraction of a larger amount of usable bandwidth. Routin...

This research investigates memory latency of cluster-based cache-coherent multiprocessor systems with di€erent interconnection topologies. Each node in a cluster includes a small number of processors and a portion of the shared-memory, which are all connected through a split transaction bus. Each processor has two levels of caches. As the number of processors in a node is small, a snoopy cache ...