this paper proposes a low voltage (±0.55v supply voltage) low power (44.65µw) high common mode rejection ratio (cmrr) differential amplifier (d.a.) with rail to rail input common mode range (icmr), constant transconductance (gm) and enhanced frequency performance. its high performance is obtained using a simple negative averaging method so that it cancels out the common mode input signals at th...

This paper proposes a high voltage ratio and low ripple interleaved boost DC-DC converter, which can be used to reduce the output voltage ripple. This converter transfers the low DC voltage of fuel cell to high DC voltage in DC link. The structure of the converter is parallel with two voltage-doublers boost converters by interleaving their output voltages to reduce the voltage ripple ratio. Bes...

The bias stress effect in pentacene organic thinfilm transistors has been investigated. The transistors utilize a thin gate dielectric based on an organic self-assembled monolayer and thus can be operated at low voltages. The bias stress-induced threshold voltage shift has been analyzed for different drain-source voltages. By fitting the timedependent threshold voltage shift to a stretched expo...

BACKGROUND Atrial stretch causes remodeling that predisposes to atrial fibrillation. We tested the hypothesis that peaks in left atrial (LA) wall stress are associated with focal remodeling. METHODS AND RESULTS Nineteen patients underwent LA mapping before catheter ablation for persistent atrial fibrillation. Finite Element Analysis was used to predict wall stress distribution based on LA geo...

In this paper, a new transformerless buck-boost converter based on ZETA converter is introduced. The proposed converter has the ZETA converter advantages such as, buck-boost capability and input to output DC insulation. The suggested converter voltage gain is higher than the classic ZETA converter. In the presented converter, only one main switch is utilized. The proposed converter offers low v...

Stress-Induced Leakage current (SILC) on ultra-thin SiO2 was measured in-situ by using a high-resolution measurement technique in a special designed chamber at 100°C with temperature stability of 0.002°C. A gate stress voltage range was measured from –3.1V down to –1.5V in steps of 0.2V. Even at these low voltages, no significant change in the degradation mechanism could be observed. Extrapolat...

This paper reports on the development of an RF IV waveform based stress test procedure. DC and low-voltage RF characterisation was carried out before and after high power RF stress. RF waveform measurements showed that the exact change in the RF load line induced during RF degradation cannot be directly inferred from the DC or low power RF measurement. The RF degradation takes the form of a kne...

This paper presents an interleaved resonant converter to reduce the voltage stress of power MOSFETs and achieve high circuit efficiency. Two half-bridge converters are connected in series at high voltage side to limit MOSFETs at Vin/2 voltage stress. Flying capacitor is used between two series half-bridge converters to balance two input capacitor voltages in each switching cycle. Variable switc...