In this paper a novel all-optical logic NAND, NOR and XOR gate based on nonlinear directional coupler theory is demonstrated. We use the identical structure which contains three waveguides, for designing these gates; the only difference however, is the power of inputs light beam. In other words, while a beam with 4 W/μm in power considered as logical one, the output is NAND gate and if a beam w...

In this paper a novel all-optical logic NAND, NOR and XOR gate based on nonlinear directional coupler theory is demonstrated. We use the identical structure which contains three waveguides, for designing these gates; the only difference however, is the power of inputs light beam. In other words, while a beam with 4 W/μm in power considered as logical one, the output is NAND gate and if a beam w...

Phased Logic (PL) is a synthesis and mapping methodology that translates a standard synchronous gate-level netlist to a non-clocked netlist of special gates called phased logic gates [1][2][3]. In this paper the implementation of PL gates and the switched capacitance of phased logic systems is discussed. An analysis of the dynamic power consumption of a phased logic system reveals a major defic...

This paper compares two different logic styles based on 45 nm technology for implementing logic gates of upto two inputs in terms of their layout area, delay and power dissipation. The XOR gate has been implemented & designed using CMOS & Pass Transistor logic on 45 nm technology .The schematic of proposed gate has been designed & simulated by using DSCH3& its equivalent layout has been develop...

--In this paper a thorough investigation of resistive logic gate, JAWS (Josephson Auto-Weber System) has been made. The current equations of this gate at each stage have been deduced. The dynamic response of this gate has been obtained by the computer-simulation. Our concept of turn-on delay of Josephson junction has been introduced. The effect of overdrive current on turn-on delay for JAWS res...

This paper investigates a universal approach of synthesizing arbitrary ternary logic circuits in quantum computation based on the truth table technology. It takes into account of the relationship of classical logic and quantum logic circuits. By adding inputs with constant value and garbage outputs, the classical non-reversible logic can be transformed into reversible logic. Combined with group...

Threshold Logic gate is used as design abstraction for most nano devices and perceived as an alternate emerging technology to CMOS implementation. It is vulnerable to manufacturing inaccuracies that alter weight values which inadvertently affect the functionality of the gate. Hence fault tolerance should be taken in to consideration during the design of threshold logic gates to tolerate manufac...

This paper proposes a novel reversible logic gate, NFT. It is a parity preserving reversible logic gate, that is, the parity of the outputs matches that of the inputs. We demonstrate that the NFT gate can implement all Boolean functions. It renders a wide class of circuit faults readily detectable at the circuit’s outputs. The proposed parity preserving reversible gate, allows any fault that af...

One of major implementations of Linear Threshold Gate (LTG) is via resonant tunneling diodes (RTD). The functionality of this threshold logic gate greatly depends on the parameters of the RTD and parametric faults impact its functionality. A suitable fault model for Combinational Threshold Logic gates is presented. A methodology is also developed to generate test patterns that detect these para...