Measurement and calibration of an analog-to-digital converter (ADC) using a histogram-based method requires a large volume of data and a long test duration, especially for a high resolution ADC. A fast and accurate calibration method for pipelined ADCs is proposed in this research. The proposed calibration method composes histograms through the outputs of each stage and calculates error sources...

Integral nonlinearity (INL) should be main source of ADC's harmonic distortion. The basic question is importance of dynamic INL. There are still open questions how to describe dynamic INL and if the dynamic corrections of ADC have sense. Key-Words: ADC, testing, static, dynamic, INL, hysteresis

Abstrac t We report on the design and characterization of three different architectures, namely two Time-toDigital Converters (TDCs) and a Time-to-Amplitude Converter (TAC) with embedded analog-to-digital conversion, implemented in a 130-nm CMOS imaging technology. The proposed circuit solutions are conceived for implementation at pixel-level, in image sensors exploiting Single-Photon Avalanche...

A low-voltage 1.2-V, 10-bit, 60–360 MS/s six channels time-interleaved reset-opamp pipelined ADC is designed and implemented in a 0.18-mm CMOS (VTHN/VTHP 1⁄4 0.63 V/20.65 V for mid-supply floating switches). Without using on-chip high-voltage and low-VT options, the proposed ADC employs low-voltage resistivedemultiplexing techniques, low-voltage gain-and-offset compensation, feedback current bi...

Abstra ct – This paper deals with a prospective approach of modeling and design evaluation applied to pipelined A/D converter architecture. In contrast with conventional ADC modeling algorithms targeted to extract the maximum ADC non-linearity error, the innovative approach presented allows to decompose magnitudes of individual error sources from a measured or simulated response of an ADC devic...

We present a high performance Time-to-Digital Converter (TDC) card that provides 10 ps timing resolution and 20 ps (rms) timing precision with a programmable full-scale-range from 160 ns to 10 μs. Differential Non-Linearity (DNL) is better than 1.3% LSB (rms) and Integral Non-Linearity (INL) is 5 ps rms. Thanks to the low power consumption (400 mW) and the compact size (78 mm x 28 mm x 10 mm), ...

This study proposes a chemoresistive gas sensor readout integrated circuit (ROIC) with simple and effective scheme for tracking canceling the offset value. Before reading out sensor, proposed ROIC dynamically updates of analog-to-digital (A/D) reference range suitable to offset, enabling accurate A/D conversion within sensor’s dynamic (DR). Therefore, this approach eliminates need additional co...

An input-dependent integral nonlinearity (INL) model is developed for pipeline ADC post-correction. The INL model consists of a static and dynamic part. The INL model is subtracted from the ADC digital output for compensation. Static compensation is performed by adjacent sets of gains and offsets. Each set compensates a certain output code range. The frequency content of the INL dynamic compone...