نتایج جستجو برای: half adder

تعداد نتایج: 192285  

2017
Maskura Nafreen Nusrat Ara MD.Imran Hossain Fariha Rahman

This paper deals with the propagation delay comparison of half adder with different FETs; such as MOSFET, CNTFET, FINFET. Nanotechnology is the promising field which functions at the molecular level to replace the conventional use of classical CMOS. By simulation, the best part is got that CNTFET shows lesser delay for half adder circuit.

Journal: :Rare Metals 2022

Skyrmion-based devices are promising candidates for non-volatile memory and low-delay time computation. Many skyrmion-based execute operation by controlling skyrmion trajectory, which can be impeded the Hall effect. Here, design of arithmetic built on synthetic antiferromagnetic (SyAF) structures is presented, where structure greatly suppress In this study, operations half adder, full XOR logic...

2013
Renu Sharma

Adders is widely used in applications such as digital signal processing (DSP) and microprocessors. In this paper Half adders are simulated and analyzed based on power dissipation, area and speed on 90nm technology using Microwind and Dsch tool. Half Adder is the basic building block in Parallel Feedback Carry Adder (PFCA).

Journal: :Applied Physics Letters 2021

With the rapid development of modern computers, problems caused by performance gap between processor and memory in von-Neumann architecture have become significant. Spintronic devices, benefitting from potential achieving in-memory computing, one most competitive candidates to bridge gap. Great efforts been made realize functions computers using spintronic devices. Here, a nonvolatile magnetic ...

2007
M. Terzer

The building of complex systems from basic logic gates is one of the hallmarks of circuit design in electrical engineering. The question arises whether a similar strategy can be adopted for the design of artificial biological systems. In this paper, we present the design of two logic gates, a biological ANDand a biological XOR. They can be combined to produce a half-adder, one of the fundamenta...

2016
Niranjan Kumar Vipul Aggarwal

In this review paper different design techniques of multi bit adder are deliberate using linear parameters logic gates. The comparison is carried by several parameter mainly focus on a number of linear threshold gates, a number of CMOS transistor, power dissipation, power delay product (PDP), average power dissipation time delay and size of the full adder circuit. Adder circuits basically imple...

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