In this study, we focused on the estimation of the global critical current density, super-current path, grain connectivity and their relationships with the faults volume fraction in the MgB2 bulks prepared by a modified PIT (powder in tube) method. Campbell’s method was applied for the purpose of acquiring the penetrating AC magnetic flux profile and the characteristic of AC magnetic field vs. ...

Continuous increase of operating frequencies and reduction of process geometries and thereby, increase of device density in DSM chips give rise to Signal Integrity problems. Owing to higher aspect ratios of interconnects, nowadays, the coupling noise between adjacent interconnects has become major SI issue giving rise to crosstalk failures. Due to process variations and manufacturing defects, i...

Three-dimensional mechanical models are used to evaluate the performance of different fault growth criteria in predicting successive growth of three échelon thrust faults similar to the segments of the Puente Hills thrust system of the Los Angeles basin, California. Four sequential Boundary Element Method models explore the growth of successive échelon faults within the system by simulating sna...

The dearth of published empirical data on major industrial systems has been one of the reasons that software engineering has failed to establish a proper scientific basis. In this paper we hope to provide a small contribution to the body of empirical knowledge. We describe a number of results from a quantitative study of faults and failures in two releases of a major commercial system. We teste...

Thick GaN films, with (1120) or (1126) planes parallel to the r-plane of sapphire, were grown by molecular beam epitaxy using AlN or GaN buffer layers. Characterization by transmission electron microscopy revealed a high density of basal-plane stacking faults (BSFs) in the (1120) non-polar GaN (a-GaN) films. {1120} and {1010} prismatic-plane and {1102} pyramidal-plane stacking faults (SFs) doma...

The purpose of this paper is to design a prevented glitch circuit (PGC) to avoid the destroyed that is caused to glitch in the paralleling comparator Flash ADC. The advantages of this prevented glitch circuit are high-speed, lower power consumption, and size effective, furthermore, it also reduce the faults. We used the TSPC’s D flip-flop to achieve this prevented glitch circuit where reduces a...

We demonstrate how the acquisition and processing of 3D electron diffraction data can be extended to characterize structural features on the mesoscale, and show how lattice distortions in superlattices of self-assembled spherical Pd nanoparticles can be quantified by three-dimensional small-angle electron diffraction tomography (3D SA-EDT). Transmission electron microscopy real space imaging an...

As the capacity and density of embedded memories have rapidly increased, the probability of memory faults will increase. That results in yield drops and quality degradation.Yield improvement of embedded memories have become very important.Yield refers to the percentage of good die on the wafer. For embedded memories Built-In-Redundancy-Analysis (BIRA)is used to achieve optimal repair rate and y...