With the improvement of software copyright protection awareness, code obfuscation technology plays a crucial role in protecting key segments. As becomes more and complex diverse, it has spawned large number malware variants, which make easy to evade detection anti-virus software. Malicious mainly depends on binary similarity analysis. However, existing analysis technologies are difficult deal w...

High-level synthesis tools generally convert abstract designs described in a high-level language into a control and data flow graph (CDFG), which is then optimized and mapped to hardware. However, there has been little work on generating CDFGs from highly pipelined software binaries, which complicate the problem of determining data flow propagation and dependencies. This paper presents a method...

A formal proof is presented for a recently presented systolic array for recursive least squares estimation by inverse updates. The derivation of this systolic array is highly non-trivial due to the presence of data contra-flow and feedback loops in the underlying signal flow graph. This would normally prohibit pipelined processing. However, it is shown that suitable delays may be introduced int...

For decades, data–flow analysis (DFA) has been done using an iterative algorithm based on graph representations of programs. For a given data–flow problem, this algorithm computes the maximum fixed point (MFP) solution. The edge structure of the graph represents possible control flows in the program. In this paper, we present a new, graph–free algorithm for computing the MFP solution. The exper...

This paper considers the rate optimal VLSI design of a recursive data ow graph (DFG). Previous research on rate optimal scheduling is not directly applicable to VLSI design. We propose a technique that inserts bu er registers to allow overlapped rate optimal implementation of VLSI. We illustrate that nonoverlapped schedules can be implemented by a simpler control path but with a larger unfoldin...

This paper proposes a novel optimization framework for the Data-Flow Graph Language (DFGL), a dependence-based notation for macro-dataflow model which can be used as an embedded domain-specific language. Our optimization framework follows a “dependence-first” approach in capturing the semantics of DFGL programs in polyhedral representations, as opposed to the standard polyhedral approach of der...

This paper discusses how we generate a VHDL code for a DSP application described in a data ow graph(DFG). Because the generated VHDL code contains only synthesizable constructs and implements details of control logics we can easily transform it into a running hardware module using logic synthesis tools. This facility is very useful for DFG based high level system design tools including our code...

We present CAMLFLOW, a custom CAML to data-flow graph (DFG) compiler. CAMLFLOW was designed to provide a front-end to various implementation-level parallel programming CASE tools taking DFGs for algorithm specification. It allows large and complex DFGs to be described in a textual and concise manner, using the facilities of the CAML LIGHT functional language. Compared to other graph notation sy...

To understand the behavior of a program, developers often need to read source code fragments in various modules. Systemdependence-graph-based (SDG) program slicing is a good candidate for supporting the investigation of data-flow paths among modules, as SDG is capable of showing the data-dependence of focused program elements. However, this technique has two problems. First, constructing SDG re...