The maxim of the superscalar architecture is that higher performance can be achieved by executing multiple instructions simultaneously. This can be realized in hardware by using a centralized instruction window. We present the design and implementation of a centralized instruction window capable of out-of-order issue and completion of four instructions per cycle. A compact layout (6.4mm by 2.2m...

Application Specific Instruction Processors (ASIPs) provide enhanced performance by directly implementing application segments in hardware as custom instructions. Recent work [1, 2] automates generation of custom instructions from application source code. Speedups of up to 6 times [3] are attainable for certain benchmarks. However, instructions generated from C are often restricted to small clu...

This paper presents a frame work for hardware acceleration for post video processing system implemented on FPGA. The deblocking filter algorithms ported on SOC having Altera NIOS-II soft core processor.SOC designed with the help of SOPC builder .Custom instructions are chosen by identifying the most frequently used tasks in the algorithm and the instruction set of NIOS-II processor has been ext...

Strassen S algorithm is an efficient method for mulliplying large matrices. We explore various ways of mapping Strassen ' s algorithm inlo reconfgurable hardware that contains one or more customisable instruction processors. Our approach has been implemented using Nios processors with custom inslrucfions and with custom-designed coprocessors, taking advantage of the additional logic and memory ...

YARDstick is a building block for ASIP development, integrating application analysis, custom instruction generation, selection and synthesis with user-defined compiler intermediate representations.

Current generation embedded applications demand the computation engine to offer high performance similar to custom hardware circuits while preserving the flexibility of software solutions. Customizable and extensible embedded processors, where the processor core can be enhanced with application-specific instructions, provide a potential solution to this conflicting requirements of performance a...

Differentiated instruction is an approach to teaching that acknowledges people have multiple paths for learning and for making sense of ideas. In e-learning, differentiated instruction has the same meaning as in traditional instruction, but different tools are available to help students learn and to provide information in ways most appropriate to them, including types of new media inclusion, le...

Using a configurable microprocessor to implement low-bit-rate audio applications by tailoring the instruction set reduces algorithm complexity and implementation cost. As an example, this paper describes a Dolby Digital (AC-3) decoder implementation that uses a commercially-available configurable microprocessor to achieve 32bit floating-point precision while minimizing the required processor cl...