In this paper, a new circuit scheme is proposed to reduce the power consumption of dynamic circuits. In the proposed circuit, an NMOS keeper transistor is used to maintain the voltage level in the output node against charge sharing, leakage current and noise sources. Using the proposed keeper scheme, the voltage swing on the dynamic node is lowered to reduce the power consumption of wide fan-in...

design and optimization of a single crystalline silicon (c-si) solar cell is performed to achieve the maximum light conversion efficiency. various parameters such as doping concentration and thicknesses, and geometrical dimension of surface pyramids are studied. the inverted surface pyramid is used to increase the efficiency of the solar cell, and engineered oxide layer is used as the passivati...

With attention to the thin film structure of colloidal quantum dot solar cells, in this paper in order to improvement of active layer absorption of them, we have proposed the use of nanostructure pattern for enhancement of their performance. For this purpose we have presented suitable nano hemisphare patterns in colloidal quantum dot solar cells for light trapping in absorption layer. Then with...

In this paper a novel very high performance current mirror is presented. It favorably benefits from such excellent parameters as: Ultra high output resistance (36.9GΩ), extremely low input resistance (0.0058Ω), low output (~0.18V) and low input voltage (~0.18V) operation, very low power consumption (20μW), very low offset current (1pA), ultra wide current dynamic range (150dB), and ultra high a...

In this paper a new synthesis for circuit design of Euclidean distance calculation is presented. The circuit is implemented based on a simple two-quadrant squarer/divider block. The circuit that employs floating gate MOS (FG-MOS) transistors operating in weak inversion region, features low circuit complexity, low power (<20uW), low supply voltage (0.5V), two quadrant input current, wide dyn...

Increasing the short circuit current due to the penetration of distributed generations (DGs) in various voltage levels and meshed topology is a basic problem in power systems. Using fault current limiter (FCL) is an efficient approach to mitigate the exceeded short circuit levels. In this paper, a new approach is presented for multiple FCLs locating to decrease short circuit levels in meshed ne...