In this paper, the charge pump (CP) based on a switches-in-source architecture is to be improved by gainboosting amplifiers for phase-locked loops (PLLs). In our design, two differential amplifiers were employed in this CP to reduce the effect of the channel length modulation in MOS transistors. As a result, the up and down currents will be rather independent of the output voltage transformed b...

Intrathecal baclofen (ITB) has been known to reduce spasticity which did not respond to oral medications and botulinum toxin treatment. However, few results have been reported comparing the effects of ITB therapy in patients with cerebral palsy (CP) and acquired brain injury. This study aimed to investigate beneficial and adverse effects of ITB bolus injection and pump therapy in patients with ...

Charge pumps are circuits that can pump charge upwards to produce voltages higher than the regular supply voltage. Novel MOS charges pump utilizing Voltage Doubler for producing clock which is double the magnitude that of input voltage supply. In this proposed paper by using Voltage Doubler as clock scheme the clocks produced in voltage form are amplified increasing the potential at every node ...

In this paper a fairly complete mathematical model of CP-PLL, which reliable enough to serve as tool for credible analysis dynamical properties these circuits, is studied. We refine relevant definitions the hold-in and pull-in ranges related local global stability. Stability steady state charge-pump phase locked loop non-trivial: straight-forward linearization available CP-PLL models may lead i...

The charge-pump circuit is an important component in a phase-locked loop (PLL). The charge-pump converts Up and Down signals from the phase/frequency detector (PFD) into current. A conventional CMOS charge-pump circuit consists of two switched current sources that pump charge into or out of the loop filter according to two logical inputs. The mismatch between the charging current and the discha...

This paper presents a low-power fractional-N synthesizer for BLE with gate-switching charge pump (CP) and high-speed prescaler. To reduce the current mismatch under low supply voltage, master-slave rail-to-rail operational trans-conductance amplifier (OTA) structure is employed to CP; Current self-matching technique guarantees charging equal discharging current. The embedded logic gates power s...

This centrifugal pump (CP) includes two parts: the blood pump and the driving apparatus. They are connected by six twin magnetic disc plates and driven by a magnetic DC motor (120W). The blood pump had six leaves deadlocked between two plastic discs. Six leaves were set at 30 degrees angles, separately. In the lower chamber of the CP, there was an inlay magnetic disc, which is connected with th...

Charge pump circuits are used to obtaining higher voltages than normal power supply voltages in low voltage Phase Lock Loop (PLL), flash Memories & DRAM’s. New integrated Dickson Charge pump design with charge transfer switches (CTS’s) is optimized and compared including the losses due to devices parasitic is described. Results show that the CTS based Dickson charge pump is the best structure f...

This paper presents an analysis of the nonlinear dynamics of a Charge Pump Phase-Locked Loop. The closed-loop circuit is modelled using decision-based equations developed by Van Paemel. State space plots; bifurcation diagrams and the presence of a chaotic attractor all indicate a significant level of underlying nonlinear phenomena. A calculation of the fractal dimension of the chaotic attractor...

In this paper, we present a 2.2-GHz low jitter PLL based on sub-sampling. It uses a phasedetector/charge-pump (PD/CP) that sub-samples the VCO output with the reference clock. In contrast to what happens in a classical PLL, the PD/CP noise is not multiplied by N in this sub-sampling PLL. Moreover, no frequency divider is needed in the locked state and hence divider noise and power can be elimin...