Low-voltage cascode current mirrors are reviewed with respect to the design limitations imposed if all transistors in the mirror are required to operate in the saturation region. It is found that both a lower limit and an upper limit exist for the cascode transistor bias voltage. Further, the use of a signal dependent cascode bias voltage is discussed and a selfbiased cascode configuration is p...

A two-terminal memristor memory based on a single VO2 nanowire is reported that can not only provide switchable resistances in a large range of about four orders of magnitude but can also maintain the resistances by a low bias voltage. The phase transition of the single VO2 nanowire was driven by the bias voltage of 0.34 V without using any heat source. The memristive behavior of the single VO2...

this paper presents a design of an uwb downconversion integrated cmos resistive ring mixer with linear voltage regulator (lvr), to supply required biasing voltages for the mixer section. the designed mixer circuit has been optimized for using in heart rate extraction system with microwave doppler radar at 2.4ghz frequency. this mixer needs 2 dc bias voltages equal to 0.5 and 1 volts for its bes...

Electrically-heated suspended, nearly defect-free, carbon nanotubes (CNTs) exhibiting negative differential conductance in the high bias regime experience a sudden drop in current (or “kink”). The bias voltage at the kink (Vkink) is found to depend strongly on gate voltage, substrate temperature, and gas environment. After subtracting the voltage drop across the contacts, however, the kink bias...

In this paper a voltage mode four quadrant analog multiplier (FQAM) using voltage differencing buffered amplifier (VDBA) based on quarter square algebraic identity is presented. In the proposed FQAM the passive resistor can be implemented using MOSFETs operating in saturationregion thereby making it suitable for integration. The effect of non idealities of VDBA has also been analyzed in this pa...

The bias stress effect in pentacene organic thinfilm transistors has been investigated. The transistors utilize a thin gate dielectric based on an organic self-assembled monolayer and thus can be operated at low voltages. The bias stress-induced threshold voltage shift has been analyzed for different drain-source voltages. By fitting the timedependent threshold voltage shift to a stretched expo...

Voltage-controlled exchange bias training and tunability are introduced. Isothermal voltage pulses are used to reverse the antiferromagnetic order parameter of magnetoelectric Cr(2)O(3), and thus continuously tune the exchange bias of an adjacent CoPd film. Voltage-controlled exchange bias training is initialized by tuning the antiferromagnetic interface into a nonequilibrium state incommensura...

This paper investigates the punch-through phenomenon in SiC Schottky Barrier Diodes (SBD) from capacitance–voltage (C–V) characteristics at high reverse bias voltage. High voltage bias application has not been possible by conventional measurement instrumentation. The authors, therefore, develop C–V characteristics measurement instrumentation which enables the application of high dc bias voltage...

A New electrical method, using charge-pumping (CP) technique under bias thermal stress (BTS), has been described in this paper. This technique is based on the charge-pumping measurement which in turn used to extract the flat-band voltage before and after an applied bias voltage at high temperature. The obtained flat band voltage shift, that is due to redistribution of the mobile ionic charges, ...