نتایج جستجو برای: زبان vhdl
تعداد نتایج: 33434 فیلتر نتایج به سال:
This paper proposes VHDL-AMS syntax extensions that enable descriptions of AMS systems with partial differential equations. We named the extended language VHDL-AMSP. An important specific need for such extensions arises from the well known MEMS modelling difficulties where complex digital and analogue electronics interfaces with distributed mechanical systems. The new syntax allows descriptions...
A novel methodology for specification and synthesis of adaptive interfaces for Soft IP cores using the VHDL+ extension to VHDL is presented . Our approach separates the specifications of IP core functional behaviour and core interface into different design units. While the core functional behaviour is defined in form of a VHDL+ model that has a transaction level interface, the core interface sp...
در این پژوهش، مدلسازی رفتاری مدولاتور کلید-خازنی بوسیله زبان توصیف سخت افزار vhdl – amsانجام شده است. این موضوع از آن جهت اهمیت دارد که مدولاتور سیگما - دلتا اصلی ترین بخش در مبدل داده های آنالوگ به دیجیتال و همچنین دیجیتال به آنالوگ فرانمونه برداری است. با وجود اینکه شبیه سازی در سطح ترانزیستوری خیلی دقیق تر است ولی بعلت زمان بسیار زیادی که محاسبات در این سطح طول می کشد این روش برای سیستم های ...
∗ This work has been partially funded by TOMI project (ESPRIT #20724) Abstract: This paper describes a method to perform error simulation to estimate the quality of the testbenches used to validate VHDL designs. The method is based in the mutation of VHDL descriptions by an error model. The proposed method allows an automatic execution of the error simulation using a commercial VHDL simulator. ...
Goossens defined structural operational semantics for a subset of VHDL-87 and proved that the parallelism present in VHDL is benign. We extend this work to include VHDL-93 features such as shared variables and postponed processes that change the underlying semantic model. In the presence of shared variables, nondeterministic execution of VHDL-93 processes destroys the unique meaning property. W...
This paper presentsa formal model of the dynamic semantics of VHDL using interval temporal logic. The model uses a declarative style that provides a semantic definition of VHDL independent of the VHDL simulation cycle. Therefore, the model can be used as a platform for comparing alternative and possibly more efficient algorithms for simulating VHDL. Furthermore, optimization techniques for impr...
This paper describes the VHDL modeling of temperature controller based on fuzzy logic intended for industrial application. The system is built of four major modules called fuzzification, inference, implication and defuzzification. The composition method selected for the fuzzy model is the Max-Min composition while the Mamdani Min operator was chosen as the implication method. Each module is mod...
The paper gives a brief view on the process of analysis and adapting formal description of the current version of the VHDL language, described by VHDL 1076-2002 standard. The work searches the possibility to build the effective syntax analyser of the entire language by using automatic tools for parsers generation. I{eywords: computer languages, EBNF, LALR, parsing, VHDL
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