نتایج جستجو برای: خطسانی iip3

تعداد نتایج: 318  

2003
Jia-yi Chen Tony Lin Paul M. Walsh

A CMOS low-noise amplifier (LNA) and mixer for a GPS front end is described. At 1.586Ghz the LNA minimum noise figure (NF) is 2.8dB, input third order intercept point (IIP3) is 2.45dB and forward gain is 30dB. With a 1.573Ghz local oscillator (LO) and a 1.586Ghz RF input the mixer minimum NF is 6.1dB, IIP3 is 12dB and a conversion gain of -3dB. The LNA and mixer consume 58mW of power from a 1.8...

2015
Zhicheng Lin Pui-In Mak Rui Paulo Martins

RF-tunable blocker-tolerant receivers (RXs) enhance the flexibility of multiband multistandard radios at low cost (Fig. 2.4.1). The mixer-first RX [1] delays the signal amplification to baseband (BB) by frequency-translating the BB lowpass response to RF as bandpass. This raises the out-of-band (OB) IIP3 (27dBm) at the expense of NF (5.5dB) and power (60mW) due to no RF gain. The noisecancellat...

2005
Shaikh K. Alam Joanne DeGroat

This paper describes a low noise variable gain amplifier (LNA) and a mixer for a WCDMA frontend receiver based on a direct architecture in 0.18-μm CMOS. The LNA provides a 50Ω input impedance and utilizes a tuned load to provide high selectivity. The LNA achieves a maximum small signal gain of 16.8 dB and a minimum gain of 4.6 dB with good input return loss. In the high gain and the low gain mo...

پایان نامه :وزارت علوم، تحقیقات و فناوری - دانشگاه صنعتی (نوشیروانی) بابل - دانشکده برق و کامپیوتر 1393

چکیده اهمیت خطسانی و نویز در استاندارد های مختلف چالشهای زیادی را در طراحی میکسر به وجود می آورد. در این مقاله تکنیک جدیدی برای بهبود خطسانی میکسر ارائه شده، که با جابجایی طبقات سوئیچ و هدایت انتقالی وتولید هارمونیک مرتبه دوم سیگنال اصلی با استفاده از یک دو برابر کننده فرکانسی و تزریق آن در دو مسیر کمکی به مدار پایه(ساب هارمونیگ میکسر بر پایه سلول گیلبرت) سعی در خطی تر کردن مدار می شود. در این...

2001
Vojkan Vidojkovic Johan van der Tang Arthur van Roermund

In this paper, low-IF receiver planning for Digital European Cordless Telephone (DECT) systems operating around 1.9 GHz is described. A low-IF receiver architecture is chosen, since it allows a high degree of integration. Unlike zero-IF receivers, this architecture does not have a DCoffset or self-reception problem. The main features of the DECT system are presented, including the translation f...

2008
HATEM TRABELSI GHAZI BOUZID FAOUZI DERBEL MOHAMED MASMOUDI

Simulation results of a 863-870-MHz frequency-hopped spread-spectrum transceiver with binary frequency shift keying (BFSK) modulation at 20 kb/s for wireless sensor applications is presented. The various blocks parameters of the transmit/receive RF front end like noise figure (NF), gain, 1 dB compression point (P-1dB), and IIP3 are simulated and optimized to meet transceiver specifications. The...

2013
Dlovan H. Mahrof Eric A.M. Klumperink Mark S. Oude Alink Bram Nauta

Highly linear CMOS radio receivers increasingly exploit linear RF V-I conversion and passive down-mixing, followed by an OpAmp based Transimpedance Amplifier at baseband. Due to the finite OpAmp gain in wideband receivers operating with large signals, virtual ground is imperfect, inducing distortion currents. We propose to apply a negative conductance to cancel this distortion. In an RF receive...

2015
Dr.G.U. Kharat Renuka Wekhande

A compact wideband 2 -6GHz highly linear low noise amplifier is designed for Digital RF application. This design is implemented using MMIC using GaAs pseudomorphic high electron mobility transistors (pHEMTs). The proposed design is fundamentally designed for SDR and cognitive radio application. This LNA is implemented in 0.5um GaAs process and has a gain of 30dB at 2.45GHz and 23dB at 5GHz,Nois...

2002
P. Sivonen S. Kangasmaa A. Pärssinen

A GPS direct conversion RF front-end with on-chip VCO fabricated in 0.35μm SiGe BiCMOS technology is presented. The properties of inductively degenerated common-emitter LNA and resistively degenerated Gilbert downconversion mixer are examined. The approximative equations for the front-end DSB-NF and IIP3 are given. By applying the derived formulas, the front-end performance can be readily estim...

2015
RAJESH KHATRI D. K. MISHRA

This paper presents the design and analysis of Ultra Wideband (UWB) mixer in 65nm CMOS technology. To achieve the optimized performance, a new mixer topology is suggested. The performance parameters of the mixer viz.: conversion gain, Noise Figure, linearity and power consumption are addressed in this paper. The simulation results of the new mixer topology suggested in this paper achieves the r...

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