Two-dimensional (2D) technology computer-aided design (TCAD) is used to analyze and compare the multi-gate digital performance of the screen-grid field effect transistor (SGrFET) with a finFET. The switching speed of the all-n-type inverter is ten times faster for the n-SGrFET than for the n-finFET, while the noise margins are ∼400 mV for a 1 V supply for both devices. The performance of the co...

Transistor size is decreasing day by day, therefore it is difficult to overcome the problem of short channel effects. For preventing short channel effects, source/drain engineering, substrate engineering & gate engineering have been introduced. According to chronological growth of VLSI Design, there is need of non-conventional structure of MOSFET and researchers are getting shifted in search of...

This paper proposes new methods for SRAM cell design in FinFET technology. One of the most important features of FinFET is that the independent front and back gates can be biased differently to control the current and the device threshold voltage. By controlling the back gate voltage of a FinFET, a SRAM cell can be designed for low power consumption. This paper proposes a new 8T (8 transistors)...

This paper presents a circuit simulator based on look-up table approach for simulation of VLSI digital circuits with emerging devices which currently cannot be simulated with existing commercial simulators. We have used a point relaxation based circuit simulator which is suitable for digital circuits. To validate our circuit simulator, we have simulated standard circuits with MOS devices of SPI...

Multi-gate MOSFETs has shown better results in subthreshold performances. The replacement of SiO2 by high-k dielectric can fulfill the requirements of Multi-gate MOSFETS with scaling trend in device dimensions. The advancement in fabrication technology has also boosted the use of different high K dielectric materials as oxide layer at different places in MOSFET structures. One of the most impor...

In this letter, we present a comparative study of positive bias temperature instability (PBTI) reliability in InxGa1−xAs FinFET with varying Indium (x = 0.53, 0.70) percentage and quantization [bulk, quantum well (QW)]. Due to lower effective transport mass and higher injection velocity, In0.7Ga0.3As QW FinFET provides better performance than In0.53Ga0.47As bulk FinFET. However, stronger quanti...

In this work, we assess the performance of a ring oscillator and a DRAM cell when they are implemented with different technologies (planar CMOS, FinFET and III-V MOSFETs), and subjected to different reliability scenarios (variability and soft errors). FinFET-based circuits show the highest robustness against variability and soft error environments.

A micro-power RFIC front-end, a low-noise amplifier (LNA) combined with a voltage controlled oscillator (VCO), has been designed using FinFET BSIMSOI model, which is developed for all FinFET transistors fabricated at the SPAWAR system center. The LNA power consumption is 26 μW at 0.5V supply and the VCO power consumption is 29 μW at 0.5V supply.