Charge pumps are circuits that can pump charge upwards to produce voltages higher than the regular supply voltage. Novel MOS charges pump utilizing Voltage Doubler for producing clock which is double the magnitude that of input voltage supply. In this proposed paper by using Voltage Doubler as clock scheme the clocks produced in voltage form are amplified increasing the potential at every node ...

Two new class AB output stages for CMOS op-amps are proposed with accurate quiescent current control. The second proposed stage also provides accurate control of the minimum current through the output transistors. The proposed stages can be operated with a supply voltage close to a transistor threshold voltage. A dynamic biasing scheme allows them to operate in a wide range of supply voltages. ...

Airport ground lighting (AGL) systems provide visual reference to aircrafts during airport operations. In AGL systems, constant current regulators feed a beacon circuit supplied through isolation transformers. Component modeling is necessary to simulate AGL systems, and thus characterize and predict their behavior. This paper presents an isolation transformer model including transformer core sa...

A micro-watt power subthreshold current modulator suitable for low-power and low-noise sensor interfaces is presented. The prototype design is based on Subthreshold Source Coupled Logic (STSCL) cells and implemented in a 0.18 μm standard CMOS technology. The modulator operates with the supply voltage of 0.8 V which is significantly lower than the nominal supply of the technology node (1.8 V). I...

The potential performance of implant free heterostructure In0 3Ga0 7As channel MOSFETs with gate lengths of 30, 20, and 15 nm is investigated using state-of-the-art Monte Carlo (MC) device simulations. The simulations are carefully calibrated against the electron mobility and sheet density measured on fabricated III-V MOSFET structures with a highdielectric. The MC simulations show that the 30 ...

The supply and threshold voltage scaling has been proposed for low-voltage/low-power design [1, 2, 3]. The programmable floating-gate circuits [3, 4] can be used to implement low-voltage/low-power digital circuits. The threshold voltages are shifted using reversed supply voltages and UV-light. The supply voltage may be reduced and the current level is determined by the threshold shift. Before t...

Motivated by emerging battery-operated applications that demand intensive computation in portable environments, techniques are investigated which reduce power consumption in CMOS digital circuits while maintaining computational throughput. Techniques for low-power operation are shown which use the lowest possible supply voltage coupled with architectural, logic style, circuit, and technology op...

In this paper, distortion in the output envelope of AM modulated a class E RF power amplifier with a nonlinear capacitance with the grading coefficient 5 . 0 = m is analyzed. The calculation of output amplitude incorporates the influence of power loss versus dc supply voltage. Derivation of half cycle output voltage waveform is done with incorporating output amplitude as a function of dc supply...

Operational Transconductance Amplifier (OTA) is one of the most significant building-blocks in integrated continuous-time filters. Here we design Low Power Low Voltage Bulk Driven OTA with a new concept of high-linearity OTA with controllable Transconductance is proposed. The OTA is simulated in a standard TSMC 0.18 mm CMOS process with a 0.6 V supply voltage. 1. INTRODUCTON Low-voltage (LV) an...

A 3–8 GHz delay-locked loop (DLL) with cycle jitter calibration is presented. To lower the operation frequency of a voltage-controlled delay line (VCDL), this DLL adopts the dividers, an edge combiner, and the multiple VCDLs. A duty cycle correction circuit is presented to maintain the output duty cycle of 50%. This DLL has been fabricated in 90-nm CMOS process. The measured peak-to-peak jitter...