Directory-based, write-invalidate cache coherence protocols are effective in reducing latencies to the memory but suffer from cache misses due to coherence actions. It is therefore important to understand the nature of data sharing causing misses for this class of protocols. In this paper we identify a set of parameters that char-acterises the accesses to migratory and producer-consumer data in...

BACKGROUND Reducing maternal mortality remains a major challenge for health care systems worldwide. The factors related to maternal mortality were extensively researched, and maternal death clusters around labour, delivery and the immediate postpartum period. Studies on the quality of maternal care in academic medical centre settings in low income countries are uncommon. METHODS A retrospecti...

We consider solutions of the non-linear von Neumann equation involving Jacobi’s elliptic functions sn, cn, and dn, and 3 linearly independent operators. In two cases one can construct a state-dependent Hamiltonian which is such that the corresponding non-linear von Neumann equation is solved by the given density operator. We prove that in a certain context these two cases are the only possibili...

"Near-miss" events, where unsuccessful outcomes are proximal to the jackpot, increase gambling propensity and may be associated with the addictiveness of gambling, but little is known about the neurocognitive mechanisms that underlie their potency. Using a simplified slot machine task, we measured behavioral and neural responses to gambling outcomes. Compared to "full-misses," near-misses were ...

<p><em>Indonesia is one of the largest rice producers in world. technological developments created a threshing machine to facilitate work farmers. In manufacture engine frame, course, must be calculated accurately. Here SolidWorks 2019 application used make it easier analyze strength frame. simulation frame using 2019, type material ASTM A36 Steel, and loading carried out on with lo...

Limited set-associativity in hardware caches can cause conflict misses when multiple data items map to the same cache locations. Conflict misses have been found to be a significant source of poor cache performance in scientific programs, particularly within loop nests. We present two compiler transformations to eliminate conflict misses: 1) modifying variable base addresses, 2) padding inner ar...

We demonstrate the importance of reducing misses in the translation-lookaside bu er (TLB) for obtaining good performance on modern computer architectures. We focus on data structures for the dynamic predecessor problem: to maintain a set S of keys from a totally ordered universe under insertions, deletions and predecessor queries. We give two general techniques for simultaneously reducing cache...