Cube based networks have received much attention over the past decade since they offer a rich interconnected structure with a number of desirable properties such as low diameter, high bisection width, lesser complexity and Cost. Among them the hypercube architecture is widely used network for parallel computer system due to its low diameter. The major drawback of hypercube based architectures i...

This report describes work performed on the Restructurable VLSI Program sponsored by the Information Processing Techniques Office of the Defense Advanced Research Projects Agency during the period 1 October 1984 through 31 March 1985.

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Modern age intelligent systems will require extensive computational power, complex parallel processing units, and low-power design. Biologically inspired neuromorphic VLSI systems present a viable solution to the demands of both highly parallel, and low-power consuming processors. Among biological sensory systems, vision is the most important one with the largest portion of the brain devoted to...

The Glottal Source is an important component of voice as it can be considered as the excitation signal to the voice apparatus. Nowadays, new techniques of speech processing such as speech recognition and speech synthesis use the glottal closure and opening instants. Current models of the glottal waves derive their shape from approximate information rather than from exactly measured data. Genera...

Image compression is a key technology in the development of various multimedia and communication applications. Perfect reconstruction of the image without any loss in picture quality and data is very important. This can be achieved with the Discrete Wavelet Transform (DWT), which is an efficient tool for image compression and video compression. The lifting based DWT architecture has the advanta...

In this paper, an efficient design flow integrating Mentor Graphics Precesion C and HDL designer is derived. In this hybrid prototyping environment, efficient FPGA architectures are scheduled rapidly with specific hardware resource/timing/architecture constraints from C/C++ level modeling by allocating the usage of functional units and real-time requirements. Using this methodology, a systemon-...

The Viterbi algorithm is a well-established technique for channel and source decoding in high performance digital communication systems. Implementations of the Viterbi algorithm on three types of locally connected processor arrays are described. This restriction is motivated by the fact that both the cost and performance metrics of VLSI favor architectures in which on-chip interprocessor commun...

| This paper presents novel VLSI architecture in support of an eecient implementation of Leighton's well-known Columnsort. The designs take advantage of re-conngurable bus architectures enhanced with simple shift switches. Our main contribution is to show that (1) Column-sort can be partitioned into two components of hardware scheme involving sorting arrays of small size and a hardware or softw...