The paradigm shift in processor design from monolithic processors to multicore has renewed interest in programming models that facilitate parallelism. While multicores are here today, the future is likely to witness architectures that use reconfigurable fabrics (FPGAs) as coprocessors. FPGAs provide an unmatched ability to tailor their circuitry per application, leading to better performance at...

Our society is digital: industry, science, governance, and individuals depend, often transparently, on the interoperation of large numbers of distributed computer systems. Although the society takes them almost for granted, these computer ecosystems are not available for all, may not be affordable for long, and raise numerous other research chal-

Computer systems are increasing in complexity at an alarming rate. In order to deal with this complexity new approaches and increased levels of automation will be required. Negotiating agents potentially offer a solution to managing this complexity which would offer new ways to more efficiently manage businesses and resources.

Statecharts is a visual formalism suitable for high-level system specification, while Verilog is a hardware description language that can be used for both behavioural and structural specification of (hardware) systems. This paper implements a semantics-preserving mapping from Graphical Statecharts to Verilog programs, which, to the best of our knowledge, is the first algorithm to bridge the gap...

In this paper, I suggest that computer mediation of human interaction will transform behavior by radically altering—in fact, dissolving—many familiar contexts in which we act. This is a time of tremendous technological change. Digital technologies supporting computation and communication are a major factor in this change. These technologies are themselves changing at a dramatic pace, in their c...

We consider the suitability of three types of language for the implementation of image processing algorithms on FPGAs; Hardware Description Languages, Parallel Language Extensions, Serial Language Extensions. We discuss the requirements for a language for this purpose and identify the weaknesses of four specific languages, VHDL, SystemC, Handel-C, SA-C and Match. Finally, we propose VERTIPH, a ...

ion level Simulation time VHDL code sizeBehavioral3 sec.84High RTL6 sec.236Synthesizable RTL8 sec.321Gate level170 sec.727Test bench le|136Table 1: The comparison of VHDL descriptions of the design on the di erent ab-straction levels.Synthesis[min] 12Area [gates]216Max. Delay [ns] 48,3Table 2: Some character...

We present a system that automatically generates a cycle-accurate and bit-true instruction level simulator (ILS) and a hardware implementation model given a description of a target processor. An ILS can be used to obtain a cycle count for a given program running on the target architecture, while the cycle length, die size, and power consumption can be obtained from the hardware implementation m...

For large and complicated ASIC designs, it is difficult to read and understand the circuits based on schematic drawings alone; as a result, a hardware description language is much needed for a succinct, descriptive, and human-readable summarization of the circuit. In this paper, we explore VHDL, a hardware description language popular in educational environment. Through the design of a 32-bits ...