High-throughput screening (HTS) is an efficient technological tool for drug discovery in the modern pharmaceutical industry. It consists of testing thousands of chemical compounds per day to select active ones. This process has many drawbacks that may result in missing a potential drug candidate or in selecting inactive compounds. We describe and compare two statistical methods for correcting s...

Article history: Received 23 May 2012 Received in revised form 17 September 2012 Accepted 2 November 2012 Available online xxxx

We present findings from a multiple week study of Internet traffic dynamics using link throughput as the primary metric. Many traces were conducted through a four node, mesh-connected, “real world” Internet testbed. We generate different types of traffic (single TCP flows, multiple TCP flows, and single UDP flows) using a generic, multipurpose, sockets program. We discuss 1) link asymmetry for ...

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Methods for estimating the performance of DBMSs can aid the design of database systems by identifying potential performance bottlenecks or by predicting the relative performance of diierent designs. Performance estimation is critical in parallel database systems with distributed memory where an eeective overall performance depends on a good choice among a wide range of ways of placing data. Thi...

Whole genome approaches using single nucleotide polymorphism (SNP) markers have the potential to transform complex disease genetics and expedite pharmacogenetics research. This has led to a requirement for high-throughput SNP genotyping platforms. Development of a successful high-throughput genotyping platform depends on coupling reliable assay chemistry with an appropriate detection system to ...

In this thesis, we propose a new reconfigurable computer substrate: diastolic arrays. Diastolic arrays are arrays of processing elements that communicate exclusively through First-In First-Out (FIFO) queues, and provide hardware support to guarantee bandwidth and buffer space for all data transfers. FIFO control implies that a module idles if its input FIFOs are empty, and stalls if its output ...

Recent research shows that the occupancy of the coherence controllers is a major performance bottleneck for distributed cache coherent shared memory multiprocessors. In this paper we study three approaches to alleviating this problem in hardwired coherence controllers, namely, multiple protocol engines, pipelined protocol engines, and split request-response streams. Split request-response strea...