Combinational circuits or shortly circuits are a model of the lowest level of computer hardware which is of interest from the point of view of computer science. Circuit complexity has a longer history than complexity theory. Complexity measures like circuit size and depth model sequential time, hardware cost, parallel time, and even storage space. This chapter contains an overview on the resear...

This paper examines various aspects related to digital signal processing in control circuits used power electronics. The discussion focuses on several common issues, including the sampling rate of signals (including phenomena such as aliasing and synchronization), coherent sampling, jitter pulses, sequential versus simultaneous multichannel systems, resolution signal-to-noise ratio, noise-shapi...

A comparison of the central processing unit (CPU) time and storage requirements for the parallel and deductive fault simulation techniques is presented. Versions of a parallel and deductive simulator were implemented and the comparison performed on an IBM System/360 Model 67 by simulating representative circuits including shift registers, sequencers, counters, two memory units, and a processor....

Usually, digital circuits are split up into control and data path as there are speciic synthesis methods for controllers and operation units. However, all known approaches to hardware veriication which make use of this fact, model the operation unit also as a nite-state machine. This leads to enormous space requirements which limit the applicability of these approaches. In order to avoid this, ...

Integrated circuit (IC) camouflaging is a promising technique to protect the design of a chip from reverse engineering. However, recent work has shown that even camouflaged ICs can be reverse engineered from the observed input/output behaviour of a chip using SAT solvers. However, these so-called SAT attacks have so far targeted only camouflaged combinational circuits. For camouflaged sequentia...

We present a new automatic test pattern generation algorithm for sequential circuits by traversing the partitioned state spaces. The new features include: (1) nondisjoint state groups are obtained such that two different state groups may have common flip-flops, (2) partial state transition graphs (STGs) are constructed at run time for each state group, (3) spectral information for state variabl...

our verification program is especially customized to focus on how to trim down the search space, it does not use the guidance popularly adopted in a sequential ATPG program to find a test quickly if the two circuits are not equivalent. Hence, our program should be integrated with an original sequential ATPG program as a dual-program to handle different situations. For example, our verification ...