In order to achieve an overall noise of less than 1000 electrons per channel for a typical input capacitance of a total of 5-10 pF, the use of a low-noise circuit is required. A well proven topology to fulfil such a requirement is shown in fig. 1. Each channel consist of a low noise chargesensitive amplifier, an active CR-(RC) pulse shaper. The main noise contributor is the input transistor of ...

This paper presents a novel Current Steering Digital to Analog Converter architecture to reduce area as well as power dissipation. The current cells of conventional binary weighted architecture require larger size of transistors for MSBs. In this paper, same sized current cell transistors for MSBs as that of LSBs and a current mirror circuit is used between the load and MSBs to provide necessar...

in this study an ultra-broad band, low-power, and high-gain cmos distributed amplifier (cmos-da) utilizing a new gain-cell based on the inductively peaking cascaded structure is presented. it is created bycascading of inductively coupled common-source (cs) stage and regulated cascode configuration (rgc).the proposed three-stage da is simulated in 0.13 μm cmos process. it achieves flat and high ...

This paper presents a low-voltage nano-power multiple-input operational transconductance amplifier (MI-OTA) with high linearity performance and increased input voltage swing. The enhanced performances are achieved thanks to employing several techniques as the bulk-driven, source-degeneration, self-cascode negative conductance along concept of signal attenuation formed by MOS transistor. MI-OTA ...