In the recent years reversible logic design has promising applications in low power computing, optical computing, quantum computing. VLSI design mainly concentrates on low power logic circuit design. In the present scenario researchers have made implementations of reversible logic gates in optical domain for its low energy consumption and high speed. This study is all about designing a reversib...

Reversible logic is of growing importance to many future computer technologies. We introduce a regular structure to realize symmetric functions in binary reversible logic. This structure, called a 2 * 2 Net Structure, allows for more efficient realization of symmetric functions than the methods shown by previous authors. Our synthesis method allows to realize arbitrary symmetric function in a c...

The Fredkin three-bit gate is universal for computational logic, and is reversible. Classically, it is impossible to do universal computation using reversible two-bit gates only. Here we construct the Fredkin gate using a combination of six two-body reversible (quantum) operators.

Abstract Micro Ring Resonator (MRR) is a successful micro-device with the help of which different types optical logic gates, processors, arithmetic units, etc. can be designed and integrated easily into modern high-speed communication network. In this article, at first, author has explained switching mechanism MRR then an optically controlled Feynman gate (i.e. reversible controlled-Not gate) u...

Recent work has begun to investigate the advantages of using reversible logic for the design of circuits. The majority of work, however, has limited itself to combinational logic. Researchers are just now beginning to suggest possibilities for sequential implementations. This paper performs a closer analysis of three latch designs proposed in previous work and suggests advantages and disadvanta...

Overcoming the IC power challenge requires signal energy recovery, which can be achieved utilizing adiabatic charging principles and logically reversible computing in the circuit design. This paper demonstrates the energyefficiency of a Bennett-clocked adiabatic CMOS multiplier via a simulation model. The design is analyzed on the logic gate level to determine an estimate for the number of irre...

We present an overview and analysis of existing work in the design of online testable reversible logic circuits, as well as propose new approaches for the design of such circuits. We explain how previously proposed approaches are unnecessarily high in overhead and in many cases do not provide adequate fault coverage. Proofs of the correctness of our approaches are provided, and discussions of t...

The charge recovery logic families have been designed several years ago not in order to eliminate the side-channel leakage but to reduce the power consumption. However, in this article we present a new charge recovery logic style not only to gain high energy efficiency but also to achieve the resistance against side-channel attacks (SDA) especially against differential power analysis (DPA) atta...

In parity preserving reversible circuit, the parity of the input vector must match the parity of the output vector. It renders a wide class of circuit faults readily detectable at the circuit’s outputs. Thus reversible logic circuits that are parity preserving will be beneficial to the development of fault tolerant systems in nanotechnology. This paper presents an efficient realization of well ...

The phenomenon of disagreement has recently been brought into focus by the debate between contextualists and relativist invariantists about epistemic expressions such as ‘might’, ‘probably ’, indicative conditionals, and the deontic ‘ought’. Against the orthodox contextualist view, it has been argued that an invariantist account can better explain apparent disagreements across contexts by appea...