نتایج جستجو برای: many core

تعداد نتایج: 1139064  

Journal: :PVLDB 2017
Alex Merritt Ada Gavrilovska Yuan Chen Dejan S. Milojicic

Key-value stores are an important tool in managing and accessing large in-memory data sets. As many applications benefit from having as much of their working state fit into main memory, an important design of the memory management of modern key-value stores is the use of log-structured approaches, enabling efficient use of the memory capacity, by compacting objects to avoid fragmented states. H...

2016
Nuno Neves Adrien Mussio Fabien Gonçalves Pedro Tomás Nuno Roma

Although conventional cache structures often reduce or mitigate the memory wall problem, they often struggle when dealing with memory-bound applications or with arbitrarily complex memory access patterns that are hard (or even impossible) to capture with dynamic prefetching mechanisms. Stream-based communication infrastructures have proved to efficiently tackle such issues in certain applicatio...

2011
Rakesh Kumar Timothy G. Mattson Gilles Pokam Rob F. Van der Wijngaart

The many-core era is different. The nature of programmers, the nature of applications, and the nature of the computing substrate are different for multi-core chips than the traditional parallel machines that drove the parallel programming debate in the past. Specifically, while traditional parallel computers were programmed by highlyeducated scientists, multi-core chips will be programmed by ma...

2010
Kevin Klues Barret Rhoden Andrew Waterman David Zhu Eric Brewer

The emergence of many-core architectures necessitates a redesign of operating systems, including the interfaces they expose to an application. We propose a new operating system, called ROS, designed specifically to address many limitations of current OSs as we move into the many-core era. Our goals are (1) to provide better support for parallel applications for both high-performance and general...

2010
Xiaocheng Zhou Hu Chen Sai Luo Ying Gao Shoumeng Yan Wei Liu Brian Lewis Bratin Saha

Processor vendors are integrating more and more cores into their chip. These many-core processors usually implement hardware coherence mechanisms, but when the core count goes to hundreds or more, it becomes prohibitively difficult to design and verify efficient hardware coherence support. Despite this, many parallel applications, for example RMS applications [9], show little data sharing, whic...

Journal: :Microprocessors and Microsystems - Embedded Hardware Design 2016
Hossein Asadi Paolo Ienne Hamid Sarbazi-Azad

In the past decades, high-performance computing has played key role to advance the emerging technologies from social netorks, search engines, and cell phones to humanoid robotics. The ver-increasing growth of high-performance computing has continously brought more opportunities for system designers to revisit oth enterprise and end-user applications. The significant advanceent of high-performan...

Journal: :Mathematical Social Sciences 2014
Takashi Akahoshi

We study college admissions problems where unacceptable agents may exist on both sides. We explore two types of conditions for the core to be a singleton. We first consider conditions on the colleges’ preferences in problems where the sets of agents and the colleges’ capacities are arbitrarily fixed and the students’ preferences are chosen freely. We next consider conditions on the colleges’ ca...

Journal: :J. Electronic Testing 2013
Cristiana Bolchini Matteo Carminati Antonio Miele

2010
John Wawrzynek Mingjie Lin Ilia Lebedev Shaoyi Cheng Daniel Burke

While ASIC design and manufacturing costs are soaring with each new technology node, the computing power and logic capacity of modern FPGAs steadily advances. Therefore, high-performance computing with FPGA-based system becomes increasingly attractive and viable. Unfortunately, truly unleashing the computing potential of FPGAs often stipulates cumbersome HDL programming and laborious manual opt...

2010
Elkin Garcia Ioannis E. Venetis Rishi Khan Guang R. Gao

Traditional parallel programming methodologies for improving performance assume cache-based parallel systems. However, new architectures, like the IBM Cyclops-64 (C64), belong to a new set of manycore-on-a-chip systems with a software managed memory hierarchy. New programming and compiling methodologies are required to fully exploit the potential of this new class of architectures. In this pape...

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