This paper addresses the low power mechanisms provided by the ZigBee and the 6LoWPAN Protocol, providing comparative assessments based on the results obtained by different researchers and available in specialized literature, running through experimental measurements on digital test banks. For a performance comparison, the parameters of each protocol have been adjusted so that it is able to func...

Power is defined as the probability of correctly detecting an effect. It is often noted , where the converse, ̄ is the probability of a type-II error (not rejecting H0 when there is an effect). When planning a new experiment, it is generally recommended to have a power of at least .80. Suppose that your design has very little power and suppose further that you found a significant effect. Since y...

In recent years, circuit size has increased due to scaling down of technology. Controlling power dissipation in these large circuits during test sessions is one of the major concerns in VLSI testing. In general power dissipation of a system in test mode is higher than the normal mode. This extra power can cause problems such as instantaneous power surge that causes circuit damage, formation of ...

This work discusses the impact of power consumption on the test time of core-based systems, when an available on-chip network is reused as test access mechanism. A previously proposed technique for the reuse of an on-chip network is extended to consider power consumption during test, while minimizing the system testing time. Experimental results with the ITC’02 SoC benchmarks show that although...

Ìn this paper, we propose two code based techniques: Variable-to-Fixed codes and Fixed-to-Variable codes for power efficient test data compression. The proposed scheme with the aim of achieving high compression ratio and low power consumption relies on reducing, the number of bits for representing the original test vector and the number of transitions per second. Simulation results on ISCAS‟89 ...

The advancement in the integrated circuit design has developed the demand for low voltage portable analog devices in the market. This demand has increased the requirement of the low-power RF transceiver. A low-power phase lock loop (PLL) is always desirable to fulfill the need for a low power RF transceiver. This paper deals with the designing of the low power transconductance- capacitance (Gm-...