In large-scale assessments such as state-wide testing programs, national sample-based surveys and international comparative studies, there are many steps involved in the measurement and reporting of student achievement. Typically, the steps involved include the following:  Items are developed and test instruments are assembled;  Student samples are selected (for sample-based surveys);  Tests...

This paper introduces a new similarity measure, the covering similarity, that we formally define for evaluating the similarity between a symbolic sequence and a set of symbolic sequences. A pair-wise similarity can also be directly derived from the covering similarity to compare two symbolic sequences. An efficient implementation to compute the covering similarity is proposed that uses a suffix...

In this article, we introduce the concept of co-covering which is the dual of covering concept. Then, we prove several theorems being similar to the theorems that have been de-veloped for the covering concept. For example, we provide the lifting criterion for co-coverings of a topological space X, which helps us to classify them by subgroups of the group of all homeomorphisms of X.

The standard methods used for analysing the reliability of electronic systems are unsuited to VLSI systems because of their large-scale and software-driven nature. In this paper, a review of the problems is presented together with an analysis of the difficulties encountered in extrapolation of the present techniques. Some proposals are presented with the intention of making the solution more ma...

Innovation in infant disciplines occurs most rapidly and successfully when a large number of small groups proceed independently under the motivation of market opportunity. In a few years, a substantial fraction of the engineering work force will have a working knowledge of LSI design. At the same time, fabrication areas are becoming more and more capital intensive. What is needed is a clean, st...

A new fault tolerant multipipeline array architecture and its diagnosis/reconfiguration algorithm will be presented. This multipipeline array design methodology is characterized by constant, fault distribution independent interstage path lengths. Other features include a low hardware overhead and a high survival rate when it is compared to existing approaches.

General VLSI Cell placement has gone through different versions depending upon the particular applications. The area under modern challenges of VLSI desgin throw light on Power minimization, Thermal capacity and Area occupation. Thus Utility function, Renewal reward and Hypergraph setup are utilized in our discussion. A brief review is given in this paper . .