نتایج جستجو برای: dvl

تعداد نتایج: 396  

2006
Kristof Richmond Stephen M. Rock

A real-time visual mosaicking and navigation system for use near the sea floor has been developed and deployed as a pilot aid on MBARI ROVs. This system provides high-precision, environment-relative vehicle positioning and control without the use of external positioning arrays. The system uses a live video feed from a camera on the ROV combined with velocity data from an acoustic Doppler veloci...

Journal: :Journal of computer-aided molecular design 2009
Jufang Shan Jie J. Zheng

Because of advances in the high-throughput screening technology, identification of a hit that can bind to a target protein has become a relatively easy task; however, in the process of drug discovery, the following hit-to-lead and lead optimization still remain challenging. In a typical hit-to-lead and lead optimization process, the analogues of the most promising hits are synthesized for the d...

Journal: :Cell 2007
Bryan T. MacDonald Mikhail V. Semenov Xi He

Molecules labeled in green and blue play positive and negative roles in Wnt/β-catenin signaling, respectively. Molecules that are labeled in both colors have dual roles. (Top left) Wnt biogenesis. A lipid modification is added to Wnt ligands by Porc in the endoplasmic reticulum (ER). Wnt ligands are glycosylated in the ER and Golgi and require Wls (also known as Evi) to traffic through the Golg...

2005
Christophe Giacomotto Vojin G. Oklobdžija

Power consumption factors such as leakage and device capacitance are inherently dependent on the type of logic family chosen to implement an application. This work compares the suitability of static CMOS, DPL, DVL, CPL and pseudo-nMOS logic families for use in near-threshold supply voltage environments. Through the joint analysis of addition logic and a register, we show a combination of CMOS a...

2015
Tobias Strauch

The C language is getting more and more popular as a design and verification language (DVL). SystemC, ParC [1] and Cx [2] are based on C. C-models of the design and verification environment can also be generated from new DVLs (e.g. Chisel [3]) or classical DVLs such as VHDL or Verilog. The execution of these models is usually license free and presumably faster than their alternative counterpart...

Journal: :The International Journal of Neuropsychopharmacology 2011

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