We have developed a manufacturing process for organic thin-film transistors and organic complementary circuits in which a microcontact-printed phosphonic acid self-assembled monolayer is employed first as an etch resist to pattern aluminum gate electrodes by wet etching and then as the gate dielectric of the same device. To our knowledge, this is the first report of a printing process for elect...

The application of one-dimensional (1D) V2O5·nH2O nanostructures as pH sensing material was evaluated. 1D V2O5·nH2O nanostructures were obtained by a hydrothermal method with systematic control of morphology forming different nanostructures: nanoribbons, nanowires and nanorods. Deposited onto Au-covered substrates, 1D V2O5·nH2O nanostructures were employed as gate material in pH sensors based o...

In the aggressive scaling of the gate dielectric thickness for continuous shrinkage of MOSFETs, a increase in the gate resistance emerges as one of major concerns from the viewpoint of eliminations in both the voltage drop through the gate under higher gate leakage current [1] and the gate depletion effect [2]. Especially, in case of poly-Si gate, with decreasing gate size, the gate depletion e...

We designed acene molecules attached to two semi-infinite metallic electrodes to explore the source-drain current of graphene and the gate leakage current of the gate dielectric material in the field-effect transistors (FETs) device using the first-principles density functional theory combined with the non-equilibrium Green's function formalism. In the acene-based molecular junctions, we modify...

Dual Energy techniques allow an estimation of the effective atomic number and electron density through identification of the photoelectric and compton scattering components in the attenuation coefficient. However in the context of material identification, it is substantially more usefull to try and identify the material type and the thickness of the sample under investigation. Several simulatio...

This paper focuses a hetero gate material dielectric DG TFET with low band gap source material, which offers high / on off I I ratio, sub 60mV/dec subthreshold swing along with significant improvement in on current. Here analytical model for 2D electric field is derived from Poisson’s equation and is used to determine the subthreshold swing, transconductance, output conductance, gate threshold ...

This paper describes the fabrication, and structural and electrical characterization of a new, aerosolnanocrystal floating-gate FET, aimed at non-volatile memory (NVM) applications. This aerosolnanocrystal NVM device features prograderase characteristics comparable to conventional stacked gate NVM devices, excellent endurance (>lo5 P/E cycles), and long-term non-volatility in spite of a thin bo...

Adiabatic logic is an implementation of reversible logic in CMOS where the current flow through the circuit is The dual rail toffoli gate is designed using transmission gate. minimum sized XOR gate is implemented at 0.12ìm. solving the problems. Transmission Gate (TG) uses to realize complex logic functions by using a small number It is implemented in Standard CMOS logic (3). Proposed CLA imple...

Energy consumption of digital circuits has become a primary constraint in electronic design. The increasing popularity of the portable devices like smart phone, ipad, tablet and notebook has created an overwhelming demand for extended battery life of these devices. Numerous methods for energy reduction in CMOS circuits have been proposed in the literature. Power reduction techniques at various ...

Continual scaling of the CMOS technology requires thinner gate dielectric to maintain high performance. However, when moving into the sub-45 nm CMOS generation, the traditional poly-Si gate approach cannot effectively reduce the gate thickness further due to the poly-depletion effect. Fully silicided Ni metal gate (FUSI) has been proven to be a promising solution. Ni FUSI metal gate can signifi...