In this paper, novel hybrid MOSFET(HMOS) structure has been proposed to reduce the gate leakage current drastically. This novel hybrid MOSFET (HMOS) uses source/drain-to-gate non-overlap region in combination with high-K layer/interfacial oxide as gate stack. The extended S/D in the non-overlap region is induced by fringing gate electric field through the high-k dielectric spacer. The gate leak...

This paper describes a method for customising the representation of floating-point numbers that exploits the flexibility of reconfigurable hardware. The method determines the appropriate size of mantissa and exponent for each operation in a design, so that a cost function with a given error specification for the output relative to a reference representation can be satisfied. Currently our tool,...

Software implementations that test two triangles for intersection often favour speed over exact calculation. They leave it to the user to choose an exact or a fast test depending on the domain of application. Hardware implementations can not opt to make this distinction since users will always expect an accelerator hardware to be applicable in all possible settings. This paper introduces a nove...

Double-gate transistors are considered as an attractive option to improve the performance of logic devices and overcome some of the difficulties encountered in further downscaling of bulk MOS field-effect transistors into the decananometer regime [1]. When the channel length is reduced below approximately 25nm, quantum effects such as direct source-to-drain tunneling under the barrier start aff...

Advances in field programmable gate arrays (FPGAs), which are the platform of choice for reconfigurable computing, have made it possible to use FPGAs in increasingly many areas of computing, including complex scientific applications. These applications demand high performance and high-precision, floating-point arithmetic. Until now, most of the research has not focussed on compliance with IEEE ...

Floating-point division is generally regarded as a low frequency, high latency operation in typical floating-point applications.So due to this not much development had taken place in this field. But nowadays floating point divider has become indispensable and increasingly important in many modern applications. Most of the previous implementation required much larger area and latencies. In this ...

We report results of the analytical and numerical investigation of self-heating effects in GaN-based high-power field-effect transistors. The problem of heat transfer in a transistor structure has been solved both analytically, using the method of images, and numerically. Two-dimensional electrothermal simulations of the GaN metal-semiconductor field-effect transistors on SiC and sapphire subst...

We report the fabrication, and electrical and optical characterization, of solution-liquid-solid (SLS) grown CdSe nanowire field-effect transistors. Ultrathin nanowires (7–12 nm diameters) with lengths between 1 $m and 10 $m were grown by the SLS technique. Al-CdSe-Al junctions are then defined over oxidized Si substrate using photolithography. The nanowires, which were very resistive in the da...