Future, ultra-miniaturized chip technologies will be increasingly susceptible against faults that result from production variability or emerge in the field, e.g. due to aging effects. To maintain viable yield and operational reliability, this contribution proposes a new set of methods for tolerating permanent faults through adaptive routing in networks on chip (NoCs). Differential Q routing is ...

A major problem in the design of large multichip crossbar networks is the latency associated with the centralized controller used to arbitrate requests. We present a solution to reduce this latency and also provide fault-tolerance by the use of multiple controllers that can operate concurrently. This paper concentrates on crossbars that are constructed using one-sided crosspoint switches, as su...

Field Programmable Gate Arrays (FPGAs) and reconfigurable crossbar switches currently represent distinct classes of integrated circuits. There is a need, however, for user-programmable devices that can provide both digital logic and fast, reconfigurable crossbar switching of digital signals within a single package. An investigation into the use of dynamically reconfigurable FPGAs for this purpo...

Autonet is a self-configuring local area network composed of switches interconnected by 100 Mbit/second, full-duplex, point-to-point links. The switches contain 12 ports that are internally connected by a full crossbar. Switches use cut-through to achieve a packet forwarding latency as low as 2 microseconds per switch. Any switch port can be cabled to any other switch port or to a host network ...

Autonet is a self-configuring local area network composed of switches interconnected by 100 Mb/s, full-duplex, point-to-point links. The switches contain 12 ports that a re internally connected by a full crossbar. Switches use cut-through to achieve a packet forwarding latency as low as 2 ms/switch. Any switch port can be cabled to any other switch port o r to a host network controller. A proce...

Autonet is a self-configuring local area network composed of switches interconnected by 100 Mbit/second, full-duplex, point-to-point links. The switches contain 12 ports that are internally connected by a full crossbar. Switches use cut-through to achieve a packet forwarding latency as low as 2 microseconds per switch. Any switch port can be cabled to any other switch port or to a host network ...

High performance packet switches frequently use a centralized scheduler (also known as an arbiter) to determine the configuration of a non-blocking crossbar. The scheduler often limits the scalability of the system because of the frequency and complexity of its decisions. A recent paper by C.-S. Chang et al. introduces an interesting two-stage switch, in which each stage uses a trivial determin...

High performance packet switches frequently use a centralized scheduler (also known as an arbiter) to determine the configuration of a non-blocking crossbar. The scheduler often limits the scalability of the system because of the frequency and complexity of its decisions. A recent paper by C.-S. Chang et al. introduces an interesting two-stage switch, in which each stage uses a trivial determin...

By converging the cyber world with the physical world, Cyber-Physical Systems (CPS) is expected to create a great impact on computer science and the society. This thesis proposes several real-time building blocks for CPS infrastructures. As for real-time wireless LAN, I compare various wireless communication paradigms and show that by deploying largest processing gain possible (i.e. lowest bit ...

In a packet switching system, arriving packets have variable lengths. They are segmented into fixed size cells before being switched. In packet-mode scheduling, cells from a packet should be delivered contiguously. Even though fixed-size cell scheduling has been well studied, packet-mode scheduling has more advantages: it has a lower implementation cost and higher throughput. In this paper, we ...