نتایج جستجو برای: cpu
تعداد نتایج: 19394 فیلتر نتایج به سال:
We provide an overview of a CPU management algorithm called RAP (Rate-based Adjustable Priority Scheduling) that provides predictable service and dynamic QOS control in the presence of varying compute times, arrival and departure of processes, and CPU overloads. A signiicant feature of RAP includes an application-level QOS manager that implements policies for graceful adaptation in the face of ...
Topographical arrangements of thalamostriatal projection neurons was examined in the rat by the retrograde tract-tracing method. After injecting Fluoro-Gold (FG) and/or cholera toxin beta-subunit (CTB) in different regions of the caudate-putamen (CPu), distribution of retrogradely labeled neurons was observed in the thalamus. The main findings were as follows: (1) Retrogradely labeled neurons w...
امروزه با توسعه صنایع الکترونیک و توجه به تکنیک های کوچک سازی قطعات الکترونیکی، توانایی دفع حرارت از این قطعات فاکتور مهمی در طراحی آن ها محسوب می شود. تکنیک های خنک سازی توسط جریان های گازی و روش های کلاسیک به نظر نمی رسد که قادر به برآورده کردن نیازهای سرمایشی موردنظر باشد. در نتیجه روش های نوینی برای خنک سازی این قطعات پیشنهاد شده اند که یکی از پرکاربردترین آن ها سیکل سرمایش میکرونی است. مهم...
This paper describes a simple microprocessor developed using a complex programmable logic device (CPLD), with an instruction set optimized for data acquisition applications. The processor encompasses a tiny instruction set having only the instructions required in data acquisition applications. Due to optimization of the features, it was possible to fit both the CPU and the programme memory in t...
In IT management, CPU utilization is arguably the most basic performance metric. It is also one of the most multi-faceted with IBM’s RMF and SMF providing over 60 variations of zSeries CPU utilizations, spanning differing degrees of granularities and complexity. So which CPU utilization metrics are right for you? Why, when, and how do you use each of them? We advocate a new, multi-tiered approa...
Microprocessors combining CPU and GPU cores using a common last-level cache pose new challenges to cache management algorithms. Since GPU cores feature much higher data access rates than CPU cores, the majority of the available cache space will be used by GPU applications, leaving only very limited cache capacity for CPU applications, which may be disadvantageous for overall system performance....
In order to investigate the role of the dorsomedial and dorsolateral caudate-putamen (CPu) in movement initiation of rats, we examined the effects of quinolinic acid lesions (30 nmol in 1 microliter) in these striatal subregions in a simple reaction time task. Results show that lesions of the dorsomedial, but not of the dorsolateral CPu increased reaction times. These findings provide further e...
The CPU scheduler is an essential component of vSphere 5.x. All workloads running in a virtual machine must be scheduled for execution and the CPU scheduler handles this task with policies that maintain fairness, throughput, responsiveness, and scalability of CPU resources. This paper describes these policies, and this knowledge may be applied to performance troubleshooting or system tuning. Th...
The trend for heterogeneous embedded systems is the integration of accelerators and general-purpose CPU cores on same die. In these integrated architectures, like Zynq UltraScale+ board (CPU+FPGA) that we target in this work, hardware support shared memory low-overhead synchronization between accelerator make case exploring strategies exploit a tight collaboration CPUs accelerator. paper propos...
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