A two-dimensional network for motion detection constructed with simple analog circuits was proposed and designed based on the lower animal vision. In the frog visual system, output signals which correspond to the two-dimensional motion direction and velocity are generated by performing simple information processing at the tectum and thalamus. The measured results of the test chip fabricated wit...

In this Letter, we propose a class of nonlinear dynamic translinear circuits as a viable tool for the rapid and systematic implementation of chaotic oscillators in analog integrated circuits. In this regard, our primary focus is on multiple-input translinear element (MITE) networks and their particular merits. We also describe, as an illustrative example, our monolithic implementation of the Lo...

Substrate noise effects caused by the integration of a DC-DC converter into a 0.13 μm CMOS technology integrated circuit are investigated in this paper. Simulations performed using the Substrate Noise Analyst tool show strong impact of switching and power supply noise on a sensitive analog block. The dependence of substrate noise coupling on physical separation distance, floorplanning and intro...

Neuromorphic systems make use of a set of specific functions that exhibit specific or unconventional behavior. These include winner-take-all (WTA), weighted average, and thresholding functions. These can be integrated using various design techniques, including analog, digital, standard, and subthreshold realizations. In this paper, we present a brief survey of charge-based realizations of sever...

This paper presents the integrated circuit design of an ultra-wideband (UWB) transceiver for a wireless endoscope that enables real-time diagnosis with high resolution images. The implemented UWB transceiver is a non-coherent transmit reference (TR) architecture with differential binary phase shift Keying (DBPSK) modulation. All-digital pulse generator (PG) and merged radio frequency (RF) front...

A high accurate and low-voltage analog CMOS current divider which operates with a single power supply voltage is designed in 0.18µm CMOS standard technology. The proposed divider uses a differential amplifier and transistor in triode region in order to perform the division. The proposed divider is modeled with neural network while TLBO algorithm is used to optimize it. The proposed optimiza...

A high accurate and low-voltage analog CMOS current divider which operates with a single power supply voltage is designed in 0.18µm CMOS standard technology. The proposed divider uses a differential amplifier and transistor in triode region in order to perform the division. The proposed divider is modeled with neural network while TLBO algorithm is used to optimize it. The proposed optimiza...

The Switched Capacitor (SC) Integrator mentioned in this paper, is part of a test chip that has been designed in 0.5 μm CMOS technology. With this novel test structure, precision investigations on major nonidealities in such a circuit can be performed. Keywords— SC integrator, analog CMOS switch, channel charge, clock feed-through.

The author hereby grants to M.I.T. permission to reproduce and distribute publicly paper and electronic copies of this thesis and to grant others the right to do so. Abstract An analog VLSI implementation of synaptic modification in realistic neurons is presented. The implementation uses CMOS integrated circuit technology to emulate the electrical behaviors of the neuron membrane, dendrite, and...