A new mathematical formulation for the Cardiff nonlinear behavioral model is presented in this work which includes dc bias voltages (drain and gate) into model. It has been verified by modeling a GaN on SiC high electron mobility transistor (HEMT) at 3.5 GHz. For case presented, interpolation of load–pull data resulted more than 90% reduction density required to generate over wide range points.

In this paper we show that an a-Si:H thin film transistor TFT stressed with bias temperature stress BTS under both gate bias and drain bias produces a nonuniform threshold voltage profile which can be obtained from the quasi-Fermi potential profile and the threshold voltage Vt -shift data of BTS under the gate bias only. The transfer and output characteristics calculated with this nonuniform Vt...

In this study, the forward bias current-voltage-temperature (I-V-T) characteristics of (Mo/Au)– AlGaN/GaN high electron mobility transistors (HEMTs) have been investigated over the temperature range of 100-450K. The barrier height (Φb), ideality factor (n), series resistance (Rs) and shunt resistance (Rp) of (Mo/Au)–AlGaN/GaN HEMTs have been calculated from their experimental forward bias curre...

1. Abstract We propose 7T/14T FD-SOI SRAM with a substrate bias control mechanism. The 14T configuration suppresses intra-die variation in a bit cell. The substrate bias control circuits detect a threshold voltage and automatically change it with the substrate bias. Thereby, the inter-die variation is suppressed. By combining these two schemes, we confirmed that a 576-kb SRAM test chip in a 0.1...