FPGAs are known to be very effective at accelerating certain classes of algorithms. A variety of FPGA platforms are available today, but because of the absence of a standardized platform architecture, each platform comes in the form of a board with a diverse set of devices and communication endpoints. Therefore, FPGA programmers typically have to spend significant effort in building interfaces ...

This paper proposes a post-filtering system for improving the quality of depth maps 3D projection on FPGA. We propose to implement Weighted Least Square (WLS) filter Field-programmable Gate Array (FPGA), which can predict disparities, cannot be measured, by using values neighboring pixels. In our design, we optimized architecture WLS at algorithm level. For hardware acceleration, use High-Level...

System Level Verification and Performance Analysis for FPGA Accelerated Computers Zhimin Chen, Xu Guo, Ambuj Sinha, and Patrick Schaumont Department of Electrical and Computer Engineering Virginia Tech, Blacksburg, VA 24060, USA E-mail: {chenzm, xuguo, ambujs87, schaum}@vt.edu. As an accelerator, Field Programmable Gate Array (FPGA) has become a great potential to assist a general-purpose proce...

This paper deals with the implementation of PID controller for a DC motor controller application on FPGA platform. The soft IP core of PID controller is implemented on FPGA ALTERA Quartus II platform by using Quartus II software version 10.1. The PWM signal is generated by ALTERA board, which further given to DC motor for its speed control. The soft IP core of PID controller is prototyped and v...

In this paper we present a design case study using Handel-C—a recently developed programming language for compilation of high-level programs directly into FPGA hardware. The design is an 8-bit RISC microcontroller core with 33 instructions, prescaler and a programmable timer. Handel-C was used throughout the entire design and debugging flow. The RISC microcontroller design was implemented in on...

Custom computing machines have demonstrated their superiority over general-purpose processors in computation-intense applications. In this paper, we investigate the use of an FPGA system to implement an automated sensor self-validation algorithm for cupola furnaces. The system was implemented on two different families of FPGA boards. Details of the software algorithm and the FPGA hardware imple...

In this paper, we describe our current work on developing tools for experimental evaluation of the efficiency of implemented countermeasures against differential fault attacks on cryptographic cores in the FPGA based systems. The developed fault injection platform enables us to analyze the impact of injected faults at the selected points of the FPGA in its run time operation. In its compact ver...