Voltage Controlled Oscillator (VCO) based ADC is unlike other ADCs. Input analog signal is converted into timing information via VCO then quantized in time. This paper demonstrates the multi bit VCO based quantizer using Frequency to Digital converter (FDC). Simulation result achieve in terms of SNR, SNDR and power dissipation. VCO based quantizer design using Cadence Virtuoso in GPDK 90nm tech...

This paper discusses the design and implementation of an inductorless differential VCO with a maximum oscillation frequency of 20 GHz, in a 47 GHz SiGe process technology. The VCO is based on a full-wave rectification frequency-doubling technique, applied to a half rate differential single-stage feedback oscillator. It also benefits from a new circuit phenomenon named hereinafter Self Injection...

Semiconductor process variation and reliability aging effect on CMOS VCO performance has been studied. A technique to mitigate the effect of process variations on the performances of nano-scale CMOS LC-VCO is presented. The LC-VCO compensation uses a process invariant current source. VCO parameters such as phase noise and core power before and after compensation over a wide range of variability...

In this paper, a 24 GHz transformer-coupled VCO is presented for a wide linear tuning range in the 0.13-μm CMOS process. The measured results of the proposed VCO show that the center frequency is 23.5 GHz with 7.4% frequency tuning range. The output frequency curve has wide linear tuning region (5.5%) at the middle of the curve. Also, the VCO exhibits good phase noise of −110.23 dBc/Hz at an of...

A dual-band monolithic voltage-controlled oscillator (VCO) has been fabricated by using the 0.18 lm 1P6M CMOS technologies. The switching transistors concept used in the tank circuit realizes the dual-band VCO operation. In order to reduce the phase noise, the pMOS transistors were used in the VCO design. The dual-band VCO demonstrates the phase noise (100 kHz offset) of )98 dBc/Hz at 2.6 GHz a...

-This paper presents the IC design of a low power, wide tuning range and low phase noise voltage-controlled oscillator (VCO) in a standard 90-nm CMOS technology. The newly proposed current-reuse cross-connected pair is utilized as a negative conductance generator to compensate the energy loss of the resonator. The supply current is reduced by half compared to that of the conventional LC-VCO. An...

The Voltage Controlled Oscillator (VCO) is one of the most important components for highfrequency transceivers. In this work IBM SiGe 0.5μm technology is used to design an on-chip VCO and MCM-D technology is used to design the VCO with off-chip varactors, inductors and capacitors. Theses results are measured at centre frequency of 2.5GHz and with a voltage supply of 3.3volts. The phase noise of...

A low phase noise, power efficient VCO using UMC 0.18μm CMOS technology has been proposed in this paper. The proposed VCO has a tuning range of 9.71GHz to 9.9GHz, with a phase noise of -79.88 dBc/Hz @ 600kHz offset. The Vtune ranging between 1V 1.5V generates sustained oscillations. The maximum power consumption of the VCO is 11.9mW using a supply voltage of 1.8V with ±10% variation. Keywords-P...

A fully-digital VCO-based ADC featuring a novel beat frequency detection scheme is demonstrated in 65nm LP CMOS. The proposed beat frequency based ADC is unique compared to previous VCO-based ADCs in that it is highly effective in measuring extremely small changes (e.g., 0.01%) in the VCO frequency within a short sampling time (e.g., 100 VCO periods). Direct amplifier-less A-to-D conversion of ...

A divider-less PLL exploits a phase detector that directly samples the VCO with a reference clock. No VCO sampling buffer is used while dummy samplers keep the VCO spur <-56dBc. A modified inverter with low short-circuit current acts as a power efficient reference clock buffer. The 2.2GHz PLL in 0.18μm CMOS achieves -125dBc/Hz in-band phase noise with only 700μW loop-components power. Introduct...