In this work, a novel Silicon on Insulator (SOI) MOSFET is proposed and investigated. The drain and source electrode structures are optimized to enhance ON-current while global device temperature and hot carrier injection are decreased. In addition, to create an effective heat passage from channel to outside of the device, a silicon region has embedded in the buried oxide. In order to reduce th...

Fully-depleted SOI devices are being considered for low power applications due to their threshold voltage, sub-threshold slope and capacitance advantages over other technologies. However, the threshold voltage of a fully-depleted SOI device is a strong function of the silicon film and sacrificial oxide thicknesses. Thus, to fully realize the advantages of fully-depleted SOI devices in commercia...

Among the range of materials used in bioengineering, parylene-C has been used in combination with silicon oxide and in presence of the serum proteins, in cell patterning. However, the structural properties of adsorbed serum proteins on these substrates still remain elusive. In this study, we use an optical biosensing technique to decipher the properties of fibronectin (Fn) and serum albumin ads...

Articles you may be interested in Observation of gate bias dependent interface coupling in thin silicon-on-insulator metal-oxide-semiconductor field-effect transistors Mobility comparison between front and back channels in ultrathin silicon-on-insulator metal-oxide-semiconductor field-effect transistors by the front-gate split capacitance-voltage method Appl. Trap evaluations of metal/oxide/sil...

Articles you may be interested in Fully complementary metal-oxide-semiconductor compatible nanoplasmonic slot waveguides for silicon electronic photonic integrated circuits Appl. Compact models considering incomplete voltage swing in complementary metal oxide semiconductor circuits at ultralow voltages: A circuit perspective on limits of switching energy Monolithically integrated low-loss silic...

We demonstrate experimentally a simple and efficient approach for silicon oxide nanowire growth, by implanting Fe(+) ions into thermally grown SiO(2) layers on Si wafers and subsequently annealing in argon and hydrogen to nucleate the nanowires. We study the effect of implantation dose and energy, growth temperature, H(2) gas flow, and growth time on the silicon oxide nanowire growth. We find t...

The nature of the conducting filaments in many resistive switching systems has been elusive. Through in situ transmission electron microscopy, we image the real-time formation and evolution of the filament in a silicon oxide resistive switch. The electroforming process is revealed to involve the local enrichment of silicon from the silicon oxide matrix. Semi-metallic silicon nanocrystals with s...

The ion implantation of heavy dopant species through very thin silicon oxide gate insulators d?grades the insulating properties of the oxide inducing an enhanced leakage current in MOS siructures as well as a decrease of the dielectric breakdown voltage. In the present work we study quantitatively the possible physico-chemical causes of these degradation phenomena a l d of their recovery by the...

A 0.25m, four-layer-metal, 1.5-V, 600-MHz, fully depleted (FD) silicon-on-insulator (SOI) CMOS 64-bit ALPHA1 microprocessor integrating 9.66 million transistors on a 209-mm silicon die has been developed leveraging the existing bulk design. FD-SOI technology is used because it has better immunity for dynamic leakage current than partially depleted SOI in highspeed dynamic circuits without body ...