This paper describes the design of an X-band balanced low noise amplifier (LNA) using an available HJFET device. The balanced LNA consists of a pair of electrically similar transistors whose input and output signals are divided or combined by 3 dB two-stage Wilkinson power dividers. The proposed balanced LNA is fabricated and measured. The measured results show that the noise figure is 1.30 dB ...

Recently, Low noise amplifier versatile used in modern wireless communication like Wi-Max, WLAN, GSM, Bluetooth and satellite communication. Low Noise amplifier have important feature like amplify the signal with rejection of noise. Low noise amplifier in modern communication used as filter with amplifier. In recent scenario low noise amplifier available in wide band, single band, multi-band fr...

A current reused low-noise amplifier (LNA) with gain compensated to extend the bandwidth and is designed for ultra-wideband (UWB) wireless receiver. The design consists of two cascode common-source amplifier and an output buffer which is implemented in 0.18um RF CMOS process. The LNA gives 13.1dB gain; 9.1GHz 3dB bandwidth (3.1-12.2GHz) while consuming 13.9mW through a 1.8V supply. Over the 3.1...

In this paper, we present a 0.7 V low-noise amplifier(LNA) using monolithic transformer feedback to neutralize the gate-drain overlap capacitance of a field-effect transistor(FET). It is a single-ended amplifier implemented in 0.18-μm CMOS technology designing for 5-GHz wireless local-area networks (LANs). This LNA achieves a simulated power gain of 10.84 dB, noise figure(NF) of 2.4 dB, and inp...

An Ultra Wide Band CMOS Low Noise Amplifier (LNA) design is presented in this paper. Due to low power consumption and extremely high data rates the UWB system is bound to be popular in the end user market. The LNA is the first stage after antenna in an UWB transceiver. The LNA is accountable for providing enough gain to the signal with the bare minimum distortion. In this work we have designed ...

A new approach for designing an ultra wideband (UWB) CMOS low noise amplifier (LNA) is presented. The aim of this design is to achieve a low noise figure, reasonable power gain and low power consumption in 3.1-10.6 GHz. Also, the figure of merit (FOM) is significantly improved at 180nm technology compared to the other state-of-the-art designs. Improved π-network and T-network are used to obt...

A fully-active low-noise amplifier (LNA) for ultrawideband application is presented. Passive on-chip inductor of conventional LNA design is replaced by low-noise active inductor, significantly reducing the total chip area of the proposed CMOS LNA. The core LNA circuit is a cascoded common-source amplifier loaded with an active inductor. Two buffer stages are used to provide the required input a...

A b s t r a c t Keywords: Cascode Topology Low Noise Amplifier Noise Figure Particle Swarm Optimization Design of a LNA is a complex process. Because it involves various parameters and needs complex trade-offs. This paper presents an optimized design of a low noise amplifier (LNA) using particle swarm optimization (PSO) technique. The proposed LNA has a cascode structure with inductive source d...

We have proposed a 2 GHz CMOS Differential Low Noise Amplifier (LNA) for wireless receiver system. The LNA is fabricated with the 0.18 μm standard CMOS process. Cadence design tool Spectre_RF is used to design and simulation based on resistors, inductors, capacitors and transistors. Power constrained methodology is used for the design of Differential Low Noise Amplifier. Consuming 9mA current a...

This paper presents the design of a 2-16 GHz ultra wide band low noise amplifier (UWB LNA). The proposed LNA has a gain of 11.5 ± 0.85 dB with NF less than 2.82 dB. Good input and output impedance matching, good isolation and linearity are achieved over the operating frequency band. The proposed UWB LNA consumes 18.14 mW of power from 1.8V supply. This UWB LNA is designed and simulated in 0.18 ...