A 2-bit Booth encoder with Josephson Transmission Lines (JTLs) and Passive Transmission Lines (PTLs) is designed. The Booth encoding method is one of the algorithms to obtain partial products. With this method, the number of partial products decreases down to the half compared to the AND array method. The circuit area of the multiplier designed with the Booth encoder method is compared to that ...

The paper presents FPGA implementation of a spectral sharpening process suitable for speech enhancement and noise reduction algorithms for digital hearing aids. Booth and Booth Wallace multiplier is used for implementing digital signal processing algorithms in hearing aids. VHDL simulation results confirm that Booth Wallace multiplier is hardware efficient and performs faster than Booth’s multi...

This work presents the first self-checking Booth-3 multiplier and a new self-checking Booth-2 multiplier using parity prediction. We propose a method which combines error-detection of Booth-3 (or Booth-2) decoder cells and parity prediction. Additionally, code disjointness is ensured by reusing logic for partial product generation. Parity prediction is applied to a carry-save-adder with the sta...

Demographic and psychological studies show that children and adults from divorced families utilise professional counselling two to three times more frequently than members coming from intact families to cope with problems in connection with separation and divorce. Research on divorce has well documented the consequences of separation and divorce for children and parents (Amato & Booth, 1997; Ft...