A novel NOR-type match-line scheme with XOR-based conditional keeper for content-addressable memory (CAM) is presented in this paper. High fan-in NOR-type match-line circuits require robust keepers to resist onchip noises. The XOR-based conditional keeper is turned off at some critical moments to reduce the delay and power consumption. The timing of control signals and their effects on noise im...

Within Flood Risk Management (FRM) decision making, there is a growing interest in participatory approaches to engage and integrate stakeholder expertise. Decision support tools are becoming common features in the FRM ‘toolkit’, yet there is a limited application of participatory methodologies in the construction of such tools. This paper reports on completed FRMRC research (Flood Risk Manageme...

Received Dec 9, 2016 Revised Mar 27, 2017 Accepted Jun 11, 2017 The proposed domino logic is developed with the combination of Current Comparison Domino (CCD) logic and Conditional High Speed Keeper (CHSK) domino logic. In order to improve the performance metrics like power, delay and noise immunity, the redesign of CHSK is proposed with the CCD. The performance improvement is based on the para...

DOMINO gates are more vulnerable to crosstalk-induced functional failures compared to static CMOS gates. Previously developed noise models generate pessimistic noise analysis because the effect of keeper in DOMINO is not properly incorporated. In this paper, a new crosstalk noise model is proposed for DOMINO logic gates. Our noise model takes the effect of keeper into account and provides more ...

Floating emissive probe plasma potential data are presented over a two-dimensional array of locations in the near Discharge Cathode Assembly (DCA) region of a 30-cm diameter ring-cusp ion thruster. Discharge plasma data are presented with beam extraction at throttling conditions comparable to the NASA TH Levels 8, 12, and 15. The operating conditions of the Extended Life Test (ELT) of the Deep ...

In recent years power saving is one of the important thing. Domino logic circuit is power efficient cicuit,so it is widely used in variety of applications in digital design. But it has a limitation of low noise immunity and more leakage current. This problem can be solved by using keeper transistor to compensate leakage current of pull down network. The conventional keeper domino circuit reduce...

We investigate defects in CMOS domino gates and derive the test conditions for them. Very-Low-Voltage Testing can improve the defect coverage, which we define as the maximum detectable resistance, of intra-gate and inter-gate resistive shorts. We also propose a new keeper design for CMOS domino circuits. The new keeper design has low performance impact and is best useful for small CMOS domino g...

This paper discusses how a robot can develop its state vector according to the complexity of the interactions with its environment. A method for controlling the complexity is proposed for a vision-based mobile robot of which task is to shoot a ball into a goal avoiding collisions with a goal keeper. First, we provide the most di cult situation (the maximum speed of the goal keeper with chasing-...