This paper analyzes in detail the Fringing Induced Barrier Lowering (FIBL) in MOS transistors with high-K gate dielectrics using two-dimensional device simulations. We found that the device short channel performance is degraded with increase in gate dielectric permittivity(Kgate) due to an increase in the dielectric physical thickness to channel length ratio. For Kgate greater than Ksi, we obse...

The dependence of the metal gate work function on the underlying gate dielectric in advanced metal-oxide-semiconductor ~MOS! gate stacks was explored. Metal work functions on high-k dielectrics are observed to differ appreciably from their values on SiO2 or in vacuum. We applied the interface dipole theory to the interface between the gate and the gate dielectric of a MOS transistor and obtaine...

Silicon nanowires (Si NW) are ideal candidates for low-cost solution processed field effect transistors (FETs) due to the ability of nanowires to be dispersed in solvents, and demonstrated high charge carrier mobility. The interface between the nanowire and the dielectric plays a crucial role in the FET characteristics, and can be responsible for unwanted effects such as current hysteresis duri...

1. Abstract We have successfully engineered n-type and p-type metal electrodes with the correct work functions on high-K gate dielectrics for high-performance CMOS applications. The resulting metal gate/high-K dielectric stacks have i) equivalent oxide thickness (EOT) of 1.0nm with negligible gate oxide leakage, ii) desirable transistor threshold voltages for n-and p-channel MOSFETs, and iii) t...

In this Letter, we report gate-tunable X-ray photoelectron emission from back-gated graphene transistors. The back-gated transistor geometry allows us to study photoemission from graphene layer and the dielectric substrate at various gate voltages. Application of gate voltage electrostatically dopes graphene and shifts the binding energy of photoelectrons in various ways depending on the origin...

Multi-gate MOSFETs has shown better results in subthreshold performances. The replacement of SiO2 by high-k dielectric can fulfill the requirements of Multi-gate MOSFETS with scaling trend in device dimensions. The advancement in fabrication technology has also boosted the use of different high K dielectric materials as oxide layer at different places in MOSFET structures. One of the most impor...

High-k gate dielectrics are used to suppress excessive transistor gate leakage and power consumption could speed up the introduction of metal gates in complementary metal oxide semiconductor (CMOS) transistors. Many new oxides are being evaluated as gate dielectrics, such as Al2O3, Y2O3, La2O3, Gd2O3, HfO2, ZrO2, and TiO2, BaZrO3, ZrSiO4 and HfSiO4. Ru, RuO2 and SrRuO3 gate electrodes grown on ...

In this paper we investigate the electrical characteristics of a new structure of gate all around strained silicon nanowire field effect transistors (FETs) with dual dielectrics by changing the radius (RSiGe) of silicon-germanium (SiGe) wire and gate dielectric. Indeed the effect of high-κ dielectric on Field Induced Barrier Lowering (FIBL) has been studied. Due to the higher electron mobility ...

Polyvinylpyrrolidone  /  Nickel  oxide  (PVP/NiO)  dielectrics  were fabricated  with  sol-gel  method  using  0.2  g  of  PVP  at  different working  temperatures  of  80,  150  and  200  ºC.  Structural  properties and surface morphology of the hybrid films were investigated by X- Ray  diffraction  (XRD)  and  Scanning  Electron Microscope  (SEM) respectively. Energy dispersive X-ray spec...