This paper introduces a technique to style and develop a completely pipelined and optimized design for Floating Point embedded processor in FPGA exploitation IEEE 754 format. The Floating purpose embedded processor performs many operations such as FP-Arithmetic, FP-Logical, FP-Trigonometric, FP-Vector, FP-Complex, FP-Signed, FP-Unsigned. In an exceedingly existing system, a fixed point illustra...