نتایج جستجو برای: economic statistical design esd
تعداد نتایج: 1574126 فیلتر نتایج به سال:
CTS began manufacturing pointing devices in 1994 for use as cursor controls, mounted in the keyboards of notebook computers. While completed keyboards were robust against ESD, many precautions were required during manufacture and assembly to protect against the effects of ESD. While these ESD “protective” controls were effective in controlling ESD, they did not eliminate the ESD susceptibility ...
With the consideration of low standby leakage in nanoscale CMOS processes, a new 2×VDD-tolerant ESD clamp circuit was presented in this paper. The new ESD clamp circuit had a high-voltage-tolerant ESD detection circuit to improve the turn-on efficiency of the silicon-controlled-rectifier-based (SCRbased) ESD device. This design had been successfully verified in a 65-nm CMOS process. The leakage...
The operation principles of gate-driven design and substratetriggered design for ESD (ElectroStatic Discharge) protection are first explained by energy-band diagrams in this paper. The onchip ESD protection devices realized in 0.18-μm and 0.35-μm CMOS processes are used to verify the efficiency of gate-driven or substrate-triggered designs. The substrate-triggered design can effectively and con...
Endoscopic submucosal dissection (ESD) is an established treatment for gastric neoplasias especially in regions with a high volume of gastric cancer. Although ESD has many advantages over endoscopic mucosal resection, ESD is technically more difficult and can result in severe complications. Therefore establishment of an effective training system is required to help endoscopists climb the ESD le...
The expression “education for sustainable development” denotes a complex of concepts, theoretical constructs, policy prescripts and practical methods and tools connecting education and learning to the social, economic and ecological dimensions of sustainable development in their dynamic interaction. Education for sustainable development (ESD) is about how – through education and learning – indi...
A successful electrostatic discharge (ESD) protection design scheme for UXGA/HDTV LCoS product has been proposed and verified in this paper. HBM and MM ESD robustness of the LCoS with both of low-voltage (LV) and high-voltage (HV) ESD protection design can achieve above 3.5kV and 200V. The analysis on I-V curve shifting of I/O pin shows the ESD damages on the GGNMOS in I/O ESD protection.
Research Motivation Effective on-chip ESD design to solve the ESD protection challenge on the analog pins for highfrequency or current-mode applications is studied. The device dimension of ESD clamp devices in analog ESD protection circuit can be reduced to have a much small input capacitance for high-frequency applications, but it can still sustain a high HBM and MM ESD level. To find the opti...
Electrostatic Discharge (ESD) is one of the major reliability issues in advanced CMOS technologies. Research has shown that only I/O based ESD protection circuits are inadequate in providing necessary ESD protection. Therefore, it is important to have an effective ESD power supply clamp across the power supply rails so that the ESD event will be discharged through it and protects the circuit co...
Electrostatic discharge (ESD) protection design for high-speed input/output (I/O) interface circuits in a 130-nm CMOS process is presented in this paper. First, the ESD protection diodes with different dimensions were designed and fabricated to evaluate their ESD levels and parasitic effects in gigahertz frequency band. With the knowledge of the dependence of device dimensions on ESD robustness...
A novel on-chip electrostatic discharge (ESD) protection design by using polysilicon diodes as the ESD clamp devices in CMOS process is first proposed in this paper. Different process splits have been experimentally evaluated to find the suitable doping concentration for optimizing the polysilicon diodes for both on-chip ESD protection design and the application requirements of the smart-card I...
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