Execution time is no longer the only performance metric for computer systems. In fact, a trend is emerging to trade raw performance for energy savings. Techniques like Dynamic Power Management (DPM, switching to low power state) and Dynamic Voltage and Frequency Scaling (DVFS, throttling processor frequency) help modern systems to reduce their power consumption while adhering to performance req...

High-performance processors are becoming increasingly power bound with technology scaling. Dynamic voltage and frequency scaling (DVFS) has emerged as an efficient method of reducing power consumption by lowering the operating voltage and frequency of a processor. We propose a multicore memory-aware DVFS scheme based on VSV, a uniprocessor DVFS algorithm that throttles a core based on L2 cache ...

Deploying dynamic voltage and frequency scaling (DVFS) techniques in a real-time context has generated some interest in recent years. However, most of this work is based on highly simplifying assumptions regarding the cost and benefit of frequency scaling. We have integrated a measurement-based DVFS technique with an EDF based scheduling framework. This enables the use of the dynamic slack caus...

High temperature gradients in System on Chip (SoC) lowered the performances, reliability and leakage power. In addition, during testing gain more compared to normal operation. Therefore, investigation of impact dynamic voltage frequency scaling (DVFS) thermal aware test scheduling performance will be main contribution this work. The algorithm which embeds effect with supply is tested ITC’02 ben...

This paper describes low-power dynamic multiple-input and multiple-output (MIMO) detection for a 4×4 MIMO-orthogonal frequency-division multiplexing (MIMO-OFDM) receiver. MIMO-OFDM systems achieve high-speed and large capacity communications. However, they impose high computational cost in MIMO detection when separating spatially multiplexed signals and they consume vast amounts of power. We pr...

Dynamic voltage frequency scaling (DVFS) has been widely adopted for run-time power management of various processing units. In the case neural units (NPUs), network applications is required to adjust and every layer consider behavior performance each layer. Unfortunately, DVFS inappropriate layer-wise NPUs due long latency compared with execution time. Because fast enough keep up layer, we prop...

We propose and evaluate two new and independently-applicable techniques, processdriven voltage scaling (PDVS) and user-driven frequency scaling (UDFS), for improved power management on processors that support Dynamic Voltage and Frequency Scaling (DVFS), e.g, those used in current laptop and desktop computers. In PDVS, a CPUcustomized profile is derived offline that encodes the minimum voltage ...

Many modern real-time systems (RTSs) are required to provide both fault tolerance and energy-efficiency in addition to their main objective to compute and deliver correct results within a specified period of time. Dynamic voltage and frequency scaling (DVFS) technique is known as one of the most effective low-energy technique for RTSs. However, most existing DVFS techniques only focus on minimi...

A novel high-speed and low-voltage CMOS level shifter circuit is proposed. The proposed circuit is suitable for block-level dynamic voltage and frequency scaling (DVFS) environment or multiple-clock and multiple-power-domain logic blocks. In order to achieve high performance in a chip consisting of logic blocks having different VDD voltages, the proposed circuit uses the circuit techniques to r...

Dynamic Voltage Frequency Scaling (DVFS) techniques are used to improve energy efficiency of GPUs. Literature survey and thorough analysis of various schemes on DVFS techniques during the last decade are presented in this paper. Detailed analysis of the schemes is included with respect to comparison of various DVFS techniques over the years. To endow with knowledge of various power management t...