This paper proposes a formal approach to designing arithmetic circuits over Galois Fields (GFs). Our method represents a GF arithmetic circuit by a hierarchical graph structure specified by variables and arithmetic formulae over GFs. The proposed circuit description is applicable to anyGF (p) (p ≥ 2) arithmetic and is formally verified by symbolic computation techniques such as polynomial reduc...

An arithmetic circuit (McKenzie and Wagner [6]) is a labelled, directed graph specifying a cascade of arithmetic and logical operations to be performed on sets of non-negative integers. In this paper, we consider the definability of functions by means of arithmetic circuits. We prove two negative results: the first shows, roughly, that a function is not circuit-definable if it has an infinite r...

We study the problem of testing if the polynomial computed by an arithmetic circuit is identically zero (ACIT). We give a deterministic polynomial time algorithm for this problem when the inputs are read-twice formulas. This algorithm also computes the MLIN predicate, testing if the input circuit computes a multilinear polynomial. We further study two related computational problems on arithmeti...

We study the problem of testing if the polynomial computed by an arithmetic circuit is identically zero. We give a deterministic polynomial time algorithm for this problem when the inputs are read-twice or readthrice formulas. In the process, these algorithms also test if the input circuit is computing a multilinear polynomial. We further study three related computational problems on arithmetic...

Residue Number System is a numerical system which arithmetic operations are performed parallelly. One of the main factors that affects the system’s performance is the complexity of reverse converter. It should be noted that the complexity of this part should not affect the earned speed of parallelly performed arithmetic unit. Therefore in this paper a high speed converter for moduli set {2n-1, ...

Residue Number System is a numerical system which arithmetic operations are performed parallelly. One of the main factors that affects the system’s performance is the complexity of reverse converter. It should be noted that the complexity of this part should not affect the earned speed of parallelly performed arithmetic unit. Therefore in this paper a high speed converter for moduli set {2n-1, ...

We study two register arithmetic computation and skew arithmetic circuits. Our main results are the following: • For commutative computations, we show that an exponential circuit size lower bound for a model of 2-register straight-line programs (SLPs) which is a universal model of computation (unlike width-2 algebraic branching programs that are not universal [AW11]). • For noncommutative compu...

This dissertation presents the results of my research in two areas: parallel algorithms/circuit complexity, and algorithmic motion planning. The chapters on circuit complexity examine the parallel complexity of several fundamental problems (such as integer division) in the model of small depth circuits. In the later chapters on motion planning, we turn to the computationally intensive problem o...

We have shown recently that a belief network can be represented as a polynomial and that many probabilistic queries can be recovered in constant time from the partial derivatives of such a polynomial. Although this polynomial is exponential in size, we have shown that it can be “computed” using an arithmetic circuit whose size is not necessarily exponential. Hence, the key computational questio...