Multiplier and divider circuits are usually required in the fields of analog signal processing and parallel-computing neural or fuzzy systems. In particular, this paper focuses on the hardware implementation of fuzzy controllers, where the divider circuit is usually the bottleneck. Multiplier/ divider circuits can be implemented with a combination of A/D-D/A converters. An efficient design base...

Multiplier and divider circuits are usually required in the fields of analog signal processing and parallel-computing neural or fuzzy systems. In particular, this paper focuses on the hardware implementation of fuzzy controllers, where the divider circuit is usually the bottleneck. Multiplier/ divider circuits can be implemented with a combination of A/D-D/A converters. An efficient design base...

a filtering power divider/power combiner based on half mode substrate integrated waveguide technology for high power applications is proposed. this design includes one half mode substrate integrated waveguide cavity, one matched load, and four sections of quarter-wavelength transmission lines. the high isolation between output ports is obtained by combining the half mode substrate integrated wa...

A dual-modulus (divide-by-16/17) prescaler has been designed using a 0.35μm CMOS technology. It consists of a divide-by-4/5 synchronous divider and a divideby-4 asynchronous divider, all implemented with MOS current mode logic. The operating frequency range is simulated to be from 0.8 to 3.1 GHz including all parasitics. The prescaler including the output buffers driving external 50Ω load draws...

Restoring and non-restoring divider has become widely applicability in the era of digital computing application due to its computation speed. In this paper, we have proposed the design of divider of different architecture for the computation of Vedic sutra based. The design of divider in the Vedic mode results in high computation throughput due to its replica architecture, where latency is mini...

A study and comparison between current mode CMOS analog multiplier, CMOS current mode multiplier/divider and high frequency four quadrant current multiplier has been carried out in this paper. Current multiplier has been simulated in SPICE with 0.35μm, 0.5μm. Simulation have been done with supply voltage of 3.3V, 1.5V and 1.55V respectively. The simulated results show that characteristic of mul...

Restoring and non-restoring divider has become widely applicability in the era of digital computing application due to its computation speed. In this paper, we have proposed the design of divider of different architecture for the computation of Vedic sutra based. The design of divider in the Vedic mode results in high computation throughput due to its replica architecture, where latency is mini...

This paper presents implementation of a high speed, low noise and low power frequency divider based on current mode logic and cascade connection of divide-by-2/3 cells for high division range. The proposed divider is optimized for high frequency and low power operation. Integration of the proposed divider in a frequency synthesizer is an attractive option for the ultra-low power carrier signal ...

This work proposes an integrated high frequency divider with an inductive peaking technique implemented in a current mode logic (CML) frequency divider. The proposed divider is composed with a master-slave flip-flop, and the master-slave flip-flop acts as a latch and read circuits which have the differential pair and cross-coupled n-MOSFETs. The cascode bias is applied in an inductive peaking c...