the purpose of this study was to evaluate the effect of short time circuit-resistance exercise with difference intensities on ghi/igf-i growth axis in healthy male students. for this purpose, 27 male students with mean and standard deviation of age 21.40±1.78 yr, height 172±0.45 cm, weight 68.85±5.39 kg were selected and randomly divided into three resistance exercise groups (each group, 9 subj...

In this paper, a new voltage controlled first order all-pass filter is presented. The proposed circuit employs a single differential voltage dual-X second generation current conveyor (DV-DXCCII) and a grounded capacitor only. The proposed all-pass filter provides both inverting and non inverting voltage-mode outputs from the same configuration simultaneously without any matching condition. Non-...

A newly developed optical method for noninvasively measuring the switching activity of operating CMOS integrated circuit chips is described. The method, denoted as picosecond imaging circuit analysis (PICA) can be used to characterize the gate-level performance of such chips and identify the locations and nature of their operational faults. The principles underlying PICA and examples of its use...

These notes are o ered to refresh your memory on some fundamental circuit analysis techniques. In particular, a review of reactive components and transformers is o ered, followed by a brief review of time domain circuit analysis. The notes conclude with a discussion of some basic power concepts. The orientation of these notes is from the perspective of the power electronics engineer. That is, w...

Background: Obesity is associated with chronic inflammation in obese subjects, which leads to an increase of inflammatory cytokines. This study aimed to evaluate the effect of different intensity circuit resistance training on levels of interleukin 1 beta and interleukin-10 in obese men. Methods: In a semi-experimental trial during May to August 2020, 44 obese men from Tehran city were selecte...

The study examined the different a number of power-saving strategies, including sleep, stack, sleep transmission gate logic, or self-controllable voltage level- upper (SVL-U). These methods are used with SRAM cells that have 6 transistors (6T), 7 (8T), 8 (9T), and 10 (10T). SVL-U method logic in suggested cell. According to comparison memory array as well cells, dynamic power is significantly d...

This paper introduces a peculiar approach of designing Static Random Access Memory (SRAM) memory cell in Quantum-dot Cellular Automata (QCA) technique. The proposed design consists of one 3-input MG, one 5-input MG in addition to a (2×1) Multiplexer block utilizing the loop-based approach. The simulation results reveals the excellence of the proposed design. The proposed SRAM cell achieves 16% ...