---In this paper a thorough investigation of resistive logic RCJL gate has been made. The current equations of this gate at each stage have been deduced. The dynamic response of this gate has been obtained by the computer-simulation. Our concept of turn-on delay has been introduced. The effect of overdrive current on turn-on delay for resistive logic gate has been shown. This will provide a bet...

This paper presents a design of the transimpedance amplifier using 0.35μm CMOS technology. In the proposed transimpedance amplifier, feedback resistor RF of conventional transimpedance amplifier has been replaced by NMOS transistor as an active feedback resistor. This circuit operates at 3.3V power supply voltage and for a photocurrent of 0.5μA.The proposed transimpedance amplifier having low n...

---In this paper a thorough investigation of resistive logic gate DCI has been made. The current equations of this gate at each stage have been deduced. The dynamic response of this DCI gate has been obtained by the computer-simulation. Our concept of turn-on delay has been introduced. The effect of overdrive current on turn-on delay for resistive logic gate has been shown. This will provide a ...

The time taken for a CMOS logic gate output to change after one or more inputs have changed is called the delay of the gate. A conventional multi-input CMOS gate is designed to have the same input to output delay irrespective of which input caused the output to change. A gate which can offer different delays for different input-output paths through it, is known as a variable input delay (VID) g...

This paper presents a compact analog neuron cell incorporating an array of charge-coupled synapses connected via a common output terminal. The novel silicon synapse is based on a two stage charge-coupled device where the weighting functionality can be integrated into the first stage. A presynaptic spike to the second gate allows the charge under the first gate to drift onto the floating diffusi...

Asymmetry in power circuit layout, mismatch in gate drive circuits, and lack of carefully matched device selection commonly result in dynamic and static current mismatch during parallel operation of IGBT devices. This paper is aimed at presenting a technique for actively controlling the gate drive of the IGBT to ensure appropriate current sharing under transient and steady state conditions. The...