In this paper, energy efficient VLSI architectures for linear turbo equalization are studied. Linear turbo equalizers exhibit dramatic bit error rate (BER) improvement over conventional equalizers by enabling a form of joint equalization and decoding in which soft information is iteratively exchanged between the equalizer and decoder. However, turbo equalizers can be computationally complex and...

A review paper on the various VLSI architectures of fuzzy logic based processors and controllers is presented over here. The focus of this paper on the study of low power VLSI implementation of fuzzy processors to result in reduced silicon area, high operating speed and the adaptability to various application domains. The paper reviews the design and implementation of different components of a ...

Wave-pipelining is a method of high-performance circuit design which implements pipelin-ing in logic without the use of intermediate latches or registers. This paper presents a tutorial of the principles of wave-pipelining and a survey of recent wave-pipelined VLSI chips and CAD tools for the synthesis and analysis of wave-pipelined circuits. Wave-pipelining has recently drawn considerable inte...

Absfrncr -The computer-aided design of a VLSI PCM-FDM transmultiplexer is presented. The entire design process from sysrem specifiearions to integrated circuit layout is carried out with the aid of specialized computer programs for analysis, synthesis and optimization at each design level: the firter network, the architecture and the circuit layout. These CAD tools support a top-down custom des...

In this paper we present a full-custom VLSI design of high-speed 2-D DCTRDCT processor based on the new class of time-recursive algorithms and architectures which has never been implemented to demonstrate its performance. We show that the VLSI implementation of this class of DCT/IDCT algorithms can easily meet the high-speed requirements of highdefinition television (HDTV) due to its modularity...

This study presents a fast search algorithm and its Very Large Scale Integration (VLSI) design to implement an Enhanced Diamond Search (EDS) of Block-based Motion estimation for video compression systems. The proposed algorithm reduces the number of search points with a slight increase in average Sum-of-Absolute Difference (SAD) per pixel and significant reduction in Peak Signal-to-Noise Ratio ...

An efficient approach to design very large scale integration (VLSI) architectures and a scheme for the implementation of the discrete sine transform (DST), based on an appropriate decomposition method that uses circular correlations, is presented. The proposed design uses an efficient restructuring of the computation of the DST into two circular correlations, having similar structures and only ...

The aim of this paper is to review emerging trends in efficient implementations of VLSI architecture of lifting based two-dimensional discrete wavelet transform (2D-DWT).The basic principle of lifting scheme is decomposing finite impulse response (FIR) filter into finite sequence of filtering steps. The inherent in place computation of lifting scheme has many advantages, and has been adapted in...

Present generation of electronic design scenario demands low power architectures. In earlier days, power was secondary as the field was premature and main concerns of design engineers were size, throughput and cost. However trade off exists between the metrics namely, size, throughput, cost and power according to the famous design metric competition theory of VLSI systems wherein improving one ...

Input vector control is an effective technique for reducing the leakage current of combinational VLSI circuits when these circuits are in the sleep mode. In this paper a design technique for applying the minimum leakage input to a sequential circuit is proposed. Our method uses the built-in scan-chain in a VLSI circuit to drive it with the minimum leakage vector when it enters the sleep mode. U...