The goal of this project is to extend the domain of applicability of formal verification methodology from functional design toward more lower-level performance sensitive design. We intend to develop new methods for circuit timing analysis based on the timed automaton model while taking special care of the scalability requirements implied by the size of industrial-size circuits. We hope that suc...

As designers strive to build systems on chips with ever diminishing device sizes, and as clock speeds of gigahertz and above are being contemplated, the limitations of synchronous circuits are beginning to surface. Consequently, there has been a renewed interest in asynchronous design techniques that use judicious timing assumptions to obtain fast circuits with low hardware overhead. However, t...

The instrumentation provides basic tools for creating SLR timing systems operating at repetition rate up to a few KHz. There is a test setup to simulate the process of ranging to various satellites and to evaluate capabilities of this instrumentation for the KHz system design. The simulation of the CHAMP laser ranging at 2 KHz repetition rate is considered as an example. Test results show that ...

Triggered drug delivery devices use external stimulus to trigger the release of drugs from device. By controlling exposure stimuli, it would allow for control over timing, duration and amount being released device, improving efficacy. 3D printing uses on-demand deposition crosslinking materials fabricate a product, increasing customisability design internal structure. using triggered devices, c...

In this paper we address the parallel timing simulation of synchronous VLSI designs on a network of workstations (NOWs). We suggest combining cycle based and conventional timing simulation techniques to achieve fast timing simulation even on NOWs which are typically characterized by low bandwidth and high communication latency. In particular we execute a timing simulator on each node of the NOW...

This paper proposes a high-level formalism, called Abstract Functional and Timing Graph (AFTG), for describing a memory architecture, which combines logical functionality and timing. After translation of the AFTG into the form a timed automaton, we are able to compute the response times of the modeled memory, and check their consistency with the values specified in the datasheet. We also addres...

We propose several new detector schemes for non-coherent communication with a chaotic signal. To successfully decode the signal the detector needs to know only the chip timing and form of the dynamical system utilised by the encoder. We show that this method can be used to achieve bit error rates comparable to other non-coherent schemes. Moreover, our method also benefits from additional genera...

Abstract The mainstream hotel intelligent sensorless power acquisition system in the market is mainly composed of infrared sensors and wireless timing switches, among which sensor core device. widely used generally detect temperature changes that occur when a person moves room to determine whether there someone room. This means stays stationary for long time, machine may not be able recognize c...

background and purpose: sleep disorders are a common problem in patients undergoing hemodialysis. poor sleep quality is considered as a potential predictor for mortality and reduced quality of life in these patients. this study aimed to evaluate subjective sleep quality in hemodialysis patients and its association with hemodialysis timing. methods: this descriptive-correlational study was condu...